74LVC245AD

The 74LVC245A and 74LVCH245A are 8-bit transceivers with 3-state outputs. The devices feature output enable (OE) and transmit/receive (DIR) for direction control. When OE is HIGH, the outputs are in a high-impedance off-state. Inputs can be driven by 3.3V or 5V devices. This feature allows these devices to be used as translators in mixed 3.3V and 5V environments. All inputs incorporate Schmitt-trigger action, making the circuit tolerant of slower input rise and fall times. The devices are fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging backflow current through the device when it is powered down.

Key features

• Wide supply voltage range: 1.2V to 5.5V
• Direct TTL-level interface capability
• CMOS low power consumption
• Inputs tolerant of overvoltage up to 5.5V
• Bus-hold on all data inputs (74LVCH245A only)
• IOFF circuit for partial power-down mode operation
• Latch-up performance exceeds 250mA
• JEDEC standard compliant:
• JESD8-7A (1.65V to 1.95V)
• JESD8-5A (2.3V to 2.7V)
• JESD8-C/JESD36 (2.7V to 3.6V)
• ESD protection:
• HBM ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 6000V
• CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V