Varnitronics
AD9228ABCPZ-40 ADI
ADI

AD9228ABCPZ-40

1.7V~1.9V LFCSP-48(7x7) Analog to Digital Converters (ADC) RoHS

LFCSP-48(7x7)ROHS3 CompliantActive
Manufacturer
ADI
Manufacturer part #
AD9228ABCPZ-40
Store part #
C578823
Package / case
LFCSP-48(7x7)
Packaging
Tray
Datasheet (PDF)

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100% Authentic · 30-Day Return or Replacement · policy

3 in stock

#C578823

Stock & price checked 2 days ago

QuantityUnit pricePack price
1+₹6,080.18₹6,080.18
3+₹5,531.58₹16,594.74
30+₹5,257.30₹1,57,719.00

1 × ₹6,080.18

₹6,080.18

excl. GST

₹7,174.61 incl. 18% GST

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  • Dispatch in 15-18 working days
  • GST invoice with every order
  • Standard pack: 260 per tray

AD9228ABCPZ-40

₹6,080.18 for 1 + GST

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Specifications

Operating Temperature
-40℃~+85℃
Interface
LVDS;SPI
Voltage - Supply
1.7V~1.9V
Number of Channels
4
Integral non - linearity
0.4LSB
Voltage Reference
Built-in
Clock/Oscillator
External
Clock Frequency
40MHz;10MHz~40MHz
Features
Soft reset
Resolution(Bits)
40MHz;12
S/N Ratio
70dB
DNL (LSB)
0.25LSB
ADC architecture
Pipeline

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tray
Standard pack
260 / Tray
Sold per
Piece
Minimum order
1
Unit weight
0.14 g

Overview

The AD9228 is a quad, 12-bit, 40/65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes <2 mW when all channels are disabled. The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom userdefined test patterns entered via the serial port interface (SPI). The AD9228 is available in an RoHS compliant, 48-lead LFCSP. It is specified over the industrial temperature range of -40°C to +85°C.

Applications

  • Medical imaging and nondestructive ultrasound
  • Portable ultrasound and digital beam-forming systems
  • Quadrature radio receivers
  • Diversity radio receivers
  • Tape drives
  • Optical networking
  • Test equipment

Key features

  • 4 ADCs integrated into 1 package
  • 119 mW ADC power per channel at 65 MSPS
  • SNR = 70 dB (to Nyquist)
  • ENOB = 11.3 bits
  • SFDR = 82 dBc (to Nyquist)
  • Excellent linearity DN L = ±0.3 LSB (typical) INL = ±0.4 LSB (typical)
  • Serial LVDS (ANSI-644, default) Low power, reduced signal option (similar to IEEE 1596.3)
  • Data and frame clock outputs
  • 315 MHz full power analog bandwidth
  • 2 V p-p input voltage range
  • 1.8 V supply operation
  • Serial port control
  • Full chip and individual channel power-down modes
  • Flexible bit orientation
  • Built in and custom digital test pattern generation
  • Programmable clock and data alignment
  • Programmable output resolution
  • Standby mode

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