ADC3442IRTQT

The ADC344x devices belong to a family of high-linearity, ultra-low-power, four-channel, 14-bit, 25MSPS to 125MSPS analog-to-digital converters (ADCs). These devices are specifically designed to support demanding high-input-frequency signals with wide dynamic range requirements. The input clock divider provides greater flexibility in system clock architecture design, while the SYSREF input enables synchronization of the entire system. The ADC344x family supports serial low-voltage differential signaling (LVDS), which reduces the number of interface lines and enables high system integration density. The serial LVDS interface is a two-wire system that serially outputs each ADC's data through two LVDS pairs. Additionally, a single-wire serial LVDS interface is also available. The internal phase-locked loop (PLL) doubles the incoming ADC sampling clock to obtain the bit clock used for the 14-bit output data of each channel in the serial output. In addition to the serial data stream, the data frame and bit clock are also transmitted as LVDS outputs.

Applications

• Multi-carrier, multi-mode cellular base station radar and smart antenna arrays
• Motor control feedback networks and vector analyzers
• Communications test equipment
• Non-destructive testing
• Microwave receivers
• SDR quadrature and diversity radio receivers

Key features

• 4-channel
• 14-bit resolution
• Single supply: 1.8V
• Serial LVDS interface
• Flexible input clock buffer supporting 1×, 2×, and 4× division
• SNR = 72.4dBFS, SFDR = 87dBc at f₁ₙ = 70MHz
• Ultra-low power: 98mW per channel at 125MSPS
• Channel isolation: 105dB
• Internal dither and chopping
• Multi-chip synchronization support
• Pin-to-pin compatible with 12-bit version devices
• Package: VQFN-56 (8mm × 8mm)