ADF41510BCPZ

The ADF41510 is an ultra- low noise frequency synthesizer that can be used to implement local oscillators (LOs) as high as 10 GHz in the upconversion and downconversion sections of wireless receivers and transmitters. The ADF41510 is designed on a high- performance silicon germanium (SiGe), bipolar complementary metal- oxide semiconductor (BiCMOS) process, achieving a normalized phase noise floor of - 235 dBc/Hz. The PFD operates up to 250 MHz (integer- N mode)/125 MHz (fractional- N mode) for improved phase noise and spur performance. The variable modulus, Σ - Δ modulator, allows extremely fine resolution when using a 49- bit divide value. The ADF41510 can be used as an integer- N PLL, or it can be used as a fractional- N PLL with either a fixed modulus for subhertz frequency resolution or variable modulus for subhertz exact frequency resolution. A complete PLL is implemented when the synthesizer is used with an external loop filter and voltage- controlled oscillator (VCO). The 10 GHz bandwidth eliminates the need for a frequency doubler or divider stage, simplifying system architecture and reducing cost. The ADF41510 is packaged in a compact, 24- lead, 4 mm × 4 mm LFCSP.

Applications

• Test equipment and instrumentation
• Wireless infrastructure
• Microwave point- to- point and multipoint radios
• Very small aperture terminal (VSAT) radios

Key features

• 1 GHz to 10 GHz bandwidth
• Ultra- low noise phase locked loop (PLL)
• Integer- N = - 235 dBc/Hz, fractional- N = - 231 dBc/Hz
• High maximum phase frequency detector (PFD) frequency
• Integer- N = 250 MHz, fractional- N = 125 MHz
• 25- bit fixed/49- bit variable fractional modulus mode
• Single- ended reference input
• 3.3 V power supply, 3.3 V charge pump
• Integrated 1.8 V logic capability
• Phase resync
• Programmable charge pump currents: 16× range
• Digital lock detect (DLD)
• 3- wire serial interface with register readback option
• Hardware and software power- down mode
• Operating range: - 40°C to +105°C