Varnitronics
CD74HC4046APWR TI
TI

CD74HC4046APWR

24MHz 2V~6V CMOS 1 TSSOP-16 Clock Generators, PLLs, Frequency Synthesizers RoHS

TSSOP-16ROHS3 CompliantActive

High-Speed CMOS Logic Phase-Locked Loop with VCO

Manufacturer
TI
Manufacturer part #
CD74HC4046APWR
Store part #
C6543
Package / case
TSSOP-16
Packaging
Tape & Reel (TR)
Datasheet (PDF)

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21 in stock

#C6543

Stock & price checked 5 days ago

QuantityUnit pricePack price
1+₹149.38₹149.38
10+₹124.31₹1,243.10
30+₹110.56₹3,316.80
100+₹95.08₹9,508.00
500+₹88.32₹44,160.00
1,000+₹85.06₹85,060.00

1 × ₹149.38

₹149.38

excl. GST

₹176.27 incl. 18% GST

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  • Standard pack: 2,000 per reel

CD74HC4046APWR

₹149.38 for 1 + GST

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Specifications

Operating Temperature
-55℃~+125℃
Clock/Oscillator
External
Output Frequency(Max)
24MHz
Voltage - Supply
2V~6V
Period Jitter, Peak-to-Peak
-;-
Phase Offset
Not supported
Features
On-chip VCO/DCO;Built-in phase-locked loop
Input
CMOS
Output Level
CMOS
Number of Outputs
1

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
Moisture sensitivity
MSL 1 (unlimited)
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
2,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.183 g

Overview

The ’HC4046A and ’HCT4046A are high-speed silicon-gate CMOS devices that are pin compatible with the CD4046B of the “4000B” series. They are specified in compliance with JEDEC standard number 7. The ’HC4046A and ’HCT4046A are phase-locked-loop circuits that contain a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3). A signal input and a comparator input are common to each comparator. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the 4046A forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.

Applications

  • FM Modulation and Demodulation
  • Frequency Synthesis and Multiplication
  • Frequency Discrimination
  • Tone Decoding
  • Data Synchronization and Conditioning
  • Voltage-to-Frequency Conversion
  • Motor-Speed Control

Key features

  • Operating Frequency Range
  • Up to 18MHz (Typ) at Vcc = 5V
  • Minimum Center Frequency of 12MHz at Vcc = 4.5V
  • Choice of Three Phase Comparators
  • Excellent VCO Frequency Linearity
  • VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption
  • Minimal Frequency Drift
  • Fanout (Over Temperature Range)
  • Standard Outputs: 10 LSTTL Loads
  • Bus Driver Outputs: 15 LSTTL Loads
  • Wide Operating Temperature Range: -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
  • 2V to 6V Operation
  • High Noise Immunity: NIL = 30%, NIH = 30% of Vcc at Vcc = 5V
  • HCT Types
  • 4.5V to 5.5V Operation
  • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
  • CMOS Input Compatibility, I ≤ 1μA at VOL, VOH

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