DS92LV090ATVEH/NOPB

The DS92LV090A is a device in the Bus LVDS transceiver family, designed for high-speed, low-power dedicated backplane or cable interfaces. The device operates from a single 3.3V supply and contains 9 differential line drivers and 9 receivers. To minimize bus loading, the driver outputs and receiver inputs are connected internally. Independent I/O on the logic side supports loopback functionality. The device also features a straight-through pinout that simplifies PCB routing and reduces stubs between its pins and connectors. The drivers convert 3V TTL single-ended levels to differential Bus LVDS (BLVDS) output levels, enabling high-speed operation with minimal power consumption and reduced EMI. Additionally, differential signaling provides ±1V common-mode noise rejection. Within a ±1V common-mode range, the receiver threshold of less than ±100 mV converts differential Bus LVDS to standard (TTL/CMOS) levels.

Key features

• Bus LVDS signaling
• Maximum propagation delay 3.2 ns
• Part-to-part skew ±800 ps
• Low-power CMOS design
• Signaling rate capability greater than 100 Mbps
• Common-mode range 0.1V to 2.3V at VIO = 200 mV
• ±100 mV receiver sensitivity
• Port pins support open and terminated fault protection
• 3.3V operation
• Power-up/power-down glitch-free (driver and receiver disabled)
• Light bus loading per Bus LVDS load (typical 5 pF)
• Designed for dual-termination applications
• Balanced output impedance
• Available in 64-pin LQFP package
• Bus pins are high-impedance when powered down (VCC = 0V)
• Typical driver channel-to-channel skew within same device: 230 ps
• Typical receiver channel-to-channel skew within same device: 370 ps