M74VHC1GT126DT1G

The MC74VHC1GT126 is a single gate noninverting 3−state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHC1GT126 requires the 3−state control input (OE) to be set Low to place the output into the high impedance state. The device input is compatible with TTL−type input thresholds and the output has a full 5 V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic−level translator from 3 V CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V CMOS Logic while operating at the high−voltage power supply. The MC74VHC1GT126 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the MC74VHC1GT126 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V(CC)=0 V. These input and output structures help prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc.

Key features

• High Speed: tpD = 3.5 ns (Typ) at V(CC) = 5 V
• Low Power Dissipation: ICC = 1 μA (Max) at TA = 25 ℃
• TTL−Compatible Inputs: VIL = 0.8 V ; VIH = 2 V
• CMOS−Compatible Outputs: VOH > 0.8 V(CC); VOL < 0.1 V(CC) @ Load
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 62 ; Equivalent Gates = 16
• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant