SN65MLVD048RGZR

The SN65MLVD048 is a quad-channel M-LVDS receiver. This device is designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which is optimized to operate at signaling rates up to 250 Mbps. Each receiver channel is controlled by a receive enable (RE (overline)). When RE (overline) = 10w, the corresponding channel is enabled; when RE (overline) = high, the corresponding channel is disabled. The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers have thresholds centered about zero with 25 mV of hysteresis to prevent output oscillations with loss of input; Type-2 receivers implement a failsafe by using an offset threshold. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges. The devices are characterized for operation from -40 ℃ to 85 ℃.

Applications

• Parallel Multipoint Data and Clock Transmission via Backplanes and Cables
• Cellular Base Stations
• Central Office Switches
• Network Switches and Routers

Key features

• Low-Voltage Differential 30-Ω to 55-Ω Line Receivers for Signaling Rates up to 250Mbps; Clock Frequencies up to 125MHz
• Type-1 Receiver Incorporates 25 mV of Input Threshold Hysteresis
• Type-2 Receiver Provides 100 mV Offset Threshold to Detect Open-Circuit and Idle-Bus Conditions
• Wide Receiver Input Common-Mode Voltage Range, -1 V to 3.4 V, Allows 2 V of Ground Noise
• Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Topology
• High Input Impedance when Vcc ≤ 1.5 V
• Enhanced ESD Protection: 7 kV HBM on all pins
• 48-Pin 7 X 7 QFN (RGZ)