SN74AUCH16244DGGR

This 16-bit buffer/driver is operational at 0.8 V to 2.7 V, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Applications

• Enhanced performance and density for tri-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters

Key features

• Sub 1-V Operable
• Max tpd of 1.8 ns at 1.8 V
• Low Power Consumption, 20-μA Max ICC
• ±8-mA Output Drive at 1.8 V
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
• 2000-V Human-Body Model (A114-A)
• 200-V Machine Model (A115-A)
• 1000-V Charged-Device Model (C101)