SN74AUP1G125DPWR

The SN74AUP1G125 bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable (OE(overline)) input is high. This device has the input-disable feature, which allows floating input signals. To ensure the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Applications

• Audio Dock: Portable
• BluRay Players and Home Theaters
• Personal Digital Assistant (PDA)
• Power: Telecom/Server
• AC/DC Supply: Single
• Controller: Analog and Digital
• Solid-State Drive (SSD): Client and Enterprise
• TV: LCD/Digital and High-Definition (HDTV)
• Tablet: Enterprise
• Wireless Headsets, Keyboards, and Mice

Key features

• Available in the NanoStar Package
• Low Static-Power Consumption (ICC = 0.9 μA Maximum)
• Low Dynamic-Power Consumption (ΔCpd = 4 pF Typical at 3.3 V)
• Low Input Capacitance (ΔC₁ = 1.5 pF Typical)
• Low Noise – Overshoot and Undershoot < 10% of VCC
• Input-Disable Feature Allows Floating Input Conditions
• Supports Partial-Power-Down Mode Operation
• Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input
• Wide Operating VCC Range of 0.8 V to 3.6 V
• 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
• tpd = 4.6 ns Maximum at 3.3 V