SN74HCT573PWR

These octal transparent D-type latches feature three-state outputs and are specifically designed to drive high-capacitance or relatively low-impedance loads. The HCT573 device is particularly suited for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. When the latch enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched and retain the data established on the D inputs. The buffered output enable (OE) input can be used to place all eight outputs in either the normal logic state (high or low logic level) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and enhanced drive capability allow bus lines to be driven without interface or pull-up components. OE does not affect the internal operation of the latches. While the outputs are in the high-impedance state, old data can be retained or new data can be entered.

Applications

• Buffer register
• I/O port
• Bidirectional bus driver
• Working register

Key features

• Operating Voltage Range of 4.5 V to 5.5 V
• High-Current 3-State Outputs Drive Bus Lines Directly or Up To 15 LSTTL Loads
• Low Power Consumption, 80-μA Max ICC
• Typical propagation delay time (tpd) = 21 ns
• ±6-mA Output Drive at 5 V
• Low Input Current of 1 μA Max
• Inputs Are TTL-Voltage Compatible
• Bus-Structured Pinout