SN74LVC2G240YZPR

1.65V~5.5V 1 2 4.6ns@3.3V,50pF DSBGA-8(1.9x1.9) Buffers, Drivers, Receivers, Transceivers RoHS

DSBGA-8(1.9x1.9)ROHS3 CompliantActive

Dual Buffer Driver With 3-State Outputs

Manufacturer: TI
Manufacturer part #: SN74LVC2G240YZPR
Store part #: C1857479
Package / case: DSBGA-8(1.9x1.9)
Category: Buffers, Drivers, Receivers, Transceivers
Packaging: Tape & Reel (TR)

Datasheet (PDF)

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10 in stock

#C1857479

Stock & price checked 3 days ago

Quantity	Unit price	Pack price
1+	₹136.32	₹136.32
10+	₹132.90	₹1,329.00
30+	₹130.53	₹3,915.90
100+	₹128.17	₹12,817.00

Quantity (min 1)

1 × ₹136.32

₹136.32

excl. GST

₹160.86 incl. 18% GST

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Standard pack: 3,000 per reel

SN74LVC2G240YZPR

₹136.32 for 1 + GST

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Specifications

Voltage - Supply: 1.65V~5.5V
Output Type: Tri-State
Operating Temperature: -40℃~+125℃
Quiescent Supply Current: 10uA
Function: Power-off isolation;Output enable;Level shifting
Current - Output High(IOH): 32mA
Series: 74LVC
Current - Output Low(IOL): 32mA
Number of Bits per Element: 1
Channel Type: Unidirectional
Number of Elements: 2
Propagation Delay: 4.6ns@3.3V,50pF

Packaging & compliance

RoHS: ROHS3 Compliant
Lifecycle: Active
Moisture sensitivity: MSL 1 (unlimited)
ECCN: EAR99
Packaging: Tape & Reel (TR)
Standard pack: 3,000 / Reel
Sold per: Piece
Minimum order: 1
Unit weight: 0.27 g

Overview

This dual buffer driver is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G240 device is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is organized as two 1-bit buffers/drivers with separate output-enable (OE(overline)) inputs. When OE(overline) is low, the device passes data from the A input to the Y output. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE(overline) should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Applications

Three-state memory address drivers
Clock drivers
Bus-oriented receivers and transmitters
Level step-down conversion applications
Applications requiring hot insertion and partial power-down operating modes

Key features

Available in the Texas Instruments NanoFree™ Package
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 4.6 ns at 3.3 V
Low Power Consumption, 10 μA Max ICC
±24 mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3V, TA = 25℃
Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3V, TA = 25℃
Ioff Supports Live Insertion, Partial-Power Down Mode, and Back-Drive Protection
Can Be Used as a Down Translator to Translate Inputs From a Max of 5.5 V Down to the VCC Level
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
1000-V Charged-Device Model (C101)