STM6524AHARDL6F

The Smart ResettM devices provide a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart ResetTM input delay time (tsRc) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button. This reset configuration provides versatility and allows the application to distinguish between a software generated interrupt and a hard system reset. When the input push-buttons are connected to microcontroller interrupt inputs, and are closed for a short time, the processor can only be interrupted. If the system still does not respond properly, continuing to keep the push-buttons closed for the extended setup time tsRc causes a hard reset of the processor through the reset output. The STM6524 has two combined delayed Smart ResetTM inputs (SR0, SR1) with preset delayed Smart ResetTM setup time (tsRc). The reset output is asserted after both of the Smart ResetTM inputs were held active for the selected tsRc delay time. Depending on selected option the RST output remains asserted either until at least one SR input goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for tREc (i.e. factory-programmed). The reset output, RST (overline) is active low or active high, push-pull or open drain with optional pull-up resistor. The device fully operates over a broad VCC range 1.65 V to 5.5 V. Below 1.575 V typ. the inputs are ignored and outputs are deasserted; the deasserted reset output levels are then valid down to 1.0 V.

Applications

• Mobile phones, smartphones, PDAs
• e-books
• MP3 players
• Games
• Portable navigation devices
• Any application that requires delayed reset push-button(s) response for improved system stability.

Key features

• Operating voltage 1.65 V to 5.5 V
• Low supply current 1.5 μA
• Integrated test mode
• Dual Smart ResetTM push-button inputs with fixed extended reset setup delay (tsRc) from 0.5 s to 10 s in 0.5 s steps (typ.), option with internal pull-up resistor
• Push-button controlled reset pulse duration Option 1: fully push-button controlled, no fixed or minimum pulse width guaranteed Option 2: defined output reset pulse duration (tREc), factory-programmed
• No power-on reset
• Single reset output
• Active low or active high
• Push-pull or open drain with optional pullup resistor
• Fixed Smart ResetTM input logic voltage levels
• Operating temperature: -40 °C to +85 °C
• UDFN6 package: 1.6 mm x 1.3 mm
• ECOPACK 2 (RoHS compliant, Halogen Free)