Varnitronics
TLC3574IDWR TI
TI

TLC3574IDWR

SPI SOIC-20-300mil Analog to Digital Converters (ADC) RoHS

SOIC-20-300milROHS3 CompliantActive

High-performance, low-power CMOS analog-to-digital converter

Manufacturer
TI
Manufacturer part #
TLC3574IDWR
Store part #
C2866270
Package / case
SOIC-20-300mil
Packaging
Tape & Reel (TR)
Datasheet (PDF)

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20 in stock

#C2866270

Stock & price checked 4 days ago

QuantityUnit pricePack price
1+₹8,862.94₹8,862.94
30+₹8,493.74₹2,54,812.20

1 × ₹8,862.94

₹8,862.94

excl. GST

₹10,458.27 incl. 18% GST

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  • Standard pack: 2,000 per reel

TLC3574IDWR

₹8,862.94 for 1 + GST

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Specifications

Operating Temperature
-40℃~+85℃
Interface
SPI
Voltage - Supply
5V;3V~5V
Number of Channels
4
Integral non - linearity
1LSB
Voltage Reference
External
Clock/Oscillator
Built-in
Clock Frequency
6.5MHz
Features
Bipolar input;Multiplexers;FIFO buffer
Resolution(Bits)
14;200kHz
S/N Ratio
80dB
ADC architecture
SAR
Programmable Gain
Not supported

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
Moisture sensitivity
MSL 1 (unlimited)
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
2,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.795 g

Overview

The TLC3574, TLC3578, TLC2574, and TLC2578 are a family of high-performance, low-power, CMOS analog-to-digital converters (ADC). TLC3574/78 is a 14-bit ADC; TLC2574/78 is a 12-bit ADC. All parts operate from single 5-V analog power supply and 3-V to 5-V digital supply. The serial interface consists of four digital input [chip select (CS), frame sync (FS), serial input-output clock (SCLK), serial data input (SDI)], and a 3-state serial data output (SDO). CS (works as SS, slave select), SDI, SDO and SCLK form an SPI interface. FS, SDI, SDO, and SCLK form DSP interface. The frame sync signal (FS) indicates the start of a serial data frame being transferred. When multiple converters connect to one serial port of a DSP, CS works as the chip select to allow the host DSP to access the individual converter. CS can be tied to ground if only one converter is used. FS must be tied to DVDD if it is not used (such as in an SPI interface). When SDI is tied to DVDD, the device is set in hardware default mode after power on and no software configuration is required. In the simplest case, only three wires (SDO, SCLK, and CS or FS) are needed to interface with the host. In addition to being a high-speed ADC with versatile control capability, these devices have an on-chip analog multiplexer (MUX) that can select any analog input or one of three self-test voltages. The sample-and-hold function is automatically started after the fourth SCLK (normal sampling) or can be controlled by a special pin, CSTART, to extend the sampling period (extended sampling). The normal sampling period can also be programmed as short sampling (12 SCLKs) or long sampling (44 SCLKs) to accommodate the faster SCLK operation popular among high-performance signal processors. The TLC3574/78 and TLC2574/78 are designed to operate with low-power consumption. The power saving feature is further enhanced with autopower-down mode and programmable conversion speeds. The conversion clock (internal OSC) is built in. The converter can also use an external SCLK as the conversion clock for maximum flexibility. The TLC3574/78 and TLC2574/78 are specified with bipolar input and a full scale range of ±10 V.

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