TPS3306-18QDRQ1

The TPS3306 family is a series of supervisory circuits designed for circuit initialization, which require two supply voltages, primarily in DSP and processor-based systems. The product spectrum of the TPS3306-xx is designed for monitoring two independent supply voltages of 3.3 V/1.5 V, 3.3 V/1.8 V, 3.3 V/2 V, 3.3 V/2.5 V or 3.3 V/5 V. During power on, RESET is asserted when the supply voltage, VDD, becomes higher than 1.1 V. Thereafter, the supervisory circuits monitor the SENSEn inputs and keep RESET active as long as SENSEn remains below the threshold voltage, VT. An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset. The delay time, Δtd(typ) = 100 ms, starts after SENSE1 and SENSE2 inputs have risen above VT. When the voltage at SENSE1 or SENSE2 input drops below the VT, the output becomes active (low) again. The integrated power-fail (PFl) comparator with separate open-drain (PFO) output can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than the main supply. The TPS3306-xx devices integrate a watchdog timer that is periodically triggered by a positive or negative transition of the watch-dog timer (WDl). When the supervising system fails to retrigger the watchdog circuit within the time-out interval, tt(out)=0.50 s, RESET becomes active for the time period td. This event also reinitializes the watchdog timer. Leaving WDl unconnected disables the watchdog. The TPS3306-xx devices are available in standard 8-pin SO packages. In a microprocessor- or DsP-based system, it is not only important to supervise the supply voltage, it is also important to ensure correct program execution. The task of a watchdog is to ensure that the program is not stalled in an indefinite loop. The microprocessor, microcontroller, or DSP has to typically toggle the watchdog input (WDl) within 0.8 s to avoid a time-out occurring. Either a low-to-high or a high-to-low transition resets the internal watchdog timer. If the input is unconnected or tied with a high-impedance driver, the watchdog is disabled and is retriggered internally. An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail-input (PFI) is compared with an internal voltage reference of 1.25 V. If the input voltage falls below the power-fail threshold (VPF|) of 1.25 V (typ), the power-fail output (PFO) goes low. If PFO goes above 1.25 V plus about 10-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to supervise any voltages above 1.25 V.

Applications

• Multivoltage DSPs and Processors
• Portable Battery-Powered Equipment
• Embedded Control Systems
• Intelligent Instruments
• Automotive Systems

Key features

• Qualified for Automotive Applications
• Dual Supervisory Circuits With Power Fail for DSP and Processor-Based Systems
• Voltage Monitor for Power Fail or Low-Battery Warning
• Watchdog Timer With 0.8-s Time-Out
• Power-On Reset Generator With Integrated 100-ms Delay Time
• Open-Drain Reset and Power-Fail Output
• Supply Current of 15 μA (Typ)
• Supply Voltage Range: 2.7 V to 6 V
• Defined RESET Output From VDD ≥ 1.1 V
• SO-8 Package
• Temperature Range: -40°C to 125°C