TPS74401KTWR

The TPS74401 low-dropout (LDO) linear regulators provide an easy-to-use robust power-management solution for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well-suited for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility lets the user configure a solution that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with specific start-up requirements. A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. The TPS74401 family of LDOs is stable without an output capacitor or with ceramic output capacitors. The device family is fully specified from T_J = -40°C to 125°C. The TPS74401 is offered in a small (5 mm × 5-mm) VQFN package, yielding a highly compact total solution size. For applications that require additional power dissipation, the DDPAK (KTW) package is also available.

Applications

• FPGA Applications
• DSP Core and I/O Voltages Post-Regulation Applications
• Applications With Special Start-Up Time or Sequencing Requirements
• Hot-Swap and Inrush Controls

Key features

• Input Voltage Range: 1.1 V to 5.5 V
• Soft-Start (SS) Pin Provides a Linear Startup With Ramp Time Set by External Capacitor
• 1% Accuracy Over Line, Load, and Temperature
• Supports Input Voltages as Low as 0.9 V With External Bias Supply
• Adjustable Output: 0.8 V to 3.6 V
• Ultra-Low Dropout: 115 mV at 3.0 A (typical)
• Stable With Any or No Output Capacitor
• Excellent Transient Response
• Open-Drain Power-Good (VQFN Only)
• Available in 5 mm × 5 mm × 1 mm VQFN and DDPAK-7 Packages