ADUCM3029BCPZ

The ADuCM3027/ADuCM3029 microcontroller units (MCUs) are ultra low power microcontroller systems with integrated power management for processing, control, and connectivity. The MCU system is based on the ARM Cortex - M3 processor, a collection of digital peripherals, embedded SRAM and flash memory, and an analog subsystem which provides clocking, reset, and power management capability in addition to an analog - to - digital converter (ADC) subsystem. System features that are common across the ADuCM3027/ ADuCM3029/ADuCM3029 - 1/ADuCM3029 - 2 MCUs include the following: Up to 26 MHz ARM Cortex - M3 processor Up to 256 kB of embedded flash memory with error correction code (ECC) Optional 4 kB cache for lower active power 64 kB system SRAM with parity Power management unit (PMU) Multilayer advanced microcontroller bus architecture (AMBA) bus matrix Central direct memory access (DMA) controller Beeper interface Serial port (SPORT), serial peripheral interface (SPI), inter - integrated circuit (I²C), and universal asynchronous receiver/transmitter (UART) peripheral interfaces Cryptographic hardware support with advanced encryption standard (AES) and secure hash algorithm (SHA) - 256 Real - time clock (RTC) General - purpose and watchdog timers Programmable general - purpose input/output (GPIO) pins Hardware cyclic redundancy check (CRC) calculator with programmable generator polynomial Power - on reset (POR) and power supply monitor (PSM) 12 - bit successive approximation register

Applications

• Internet of Things (IoT)
• Electronic shelf label (ESL) and signage
• Smart infrastructure
• Smart lock
• Asset tracking
• Smart machine, smart metering, smart building, smart city, and smart agriculture
• Wearables
• Fitness and clinical
• Machine learning and neural network

Key features

• EEMBC ULPMark - CP score: 245.5
• Ultra low power active and hibernate mode
• Active mode dynamic current: 30 μAᵢ /MHz (typical)
• Flexi mode: 300 μA (typical)
• Hibernate mode: 750 nA (typical)
• Shutdown mode: 60 nA (typical)
• ARM Cortex - M3 processor with MPU
• Up to 26 MHz with serial wire debug interface
• Power management Single - supply operation (V₍BAT₎): 1.74 V to 3.6 V Optional buck converter for improved efficiency
• Memory options 128 kB/256 kB of embedded flash memory with ECC 4 kB of cache memory to reduce active power 64 kB of configurable system SRAM with parity up to 32 kB of SRAM retained in hibernate mode
• Safety Watchdog with dedicated on - chip oscillator Hardware CRC with programmable polynomial Multiparity bit protected SRAM ECC protected embedded flash
• Security TRNG User code protection Hardware cryptographic accelerator supporting AES - 128, AES - 256, and SHA - 256
• 3 SPI interfaces to enable glueless interface to sensors, radios, and converters
• I2C and UART interfaces
• SPORT for natively interfacing with converters and radios
• Programmable GPIOs (44 in LFCSP and 34 in WLCSP)
• 3 general - purpose timers with PWM support
• RTC and FLEX_RTC with SensorStrobe and time stamping
• Programmable beeper
• 25 - channel DMA controller
• 26 MHz clock: on - chip oscillator, external crystal oscillator
• 32 kHz clock: on - chip oscillator, low power crystal oscillator
• Integrated PLL with programmable divider
• 12 - bit SAR ADC, 1.8 MSPS, 8 channels, and digital comparator