HC32F448JCTI-LQ48

Key features

• ARMv7-M architecture 32-bit Cortex-M4 CPU with FPU, MPU, DSP with SIMD instructions, and CoreSight standard debug unit
• Up to 200MHz operating frequency, delivering 250DMIPS or 680 CoreMarks performance
• Up to 256KB Flash
• Up to 68KB single-cycle access high-speed SRAM
• System supply VCC: 1.8 ~ 3.6V
• 7 independent clock sources: external main crystal oscillator (4 ~ 25MHz), external 32.768kHz RTC crystal, internal high-speed RC (16/20MHz), internal medium-speed RC (8MHz), internal low-speed RC (32kHz), PLL, internal dedicated watchdog RC (10kHz)
• 15 reset sources including POR, LVD reset, and pin reset, each with an independent flag bit
• 3 low-power modes: Sleep, Stop, and Standby
• 12-channel dual-master DMA controller
• 4 data computation units
• Peripheral event mutual triggering support
• 3 independent 12-bit 2.5Msps ADCs
• 2 independent 12-bit DACs
• 4 independent voltage comparators
• 2 multi-function 16-bit PWM timers
• 3 16-bit motor control PWM timers
• 1 32-bit general-purpose timer
• 4 16-bit general-purpose timers
• 2 16-bit basic timers
• RTC timer
• 2 watchdog timers with dedicated internal clock support
• Up to 67 GPIO pins
• Up to 62 5V-tolerant I/O pins
• Up to 14 communication interfaces
• 6 USARTs with ISO7816-3 protocol support
• 3 SPIs
• 2 I2Cs with SMBus protocol support
• 1 QSPI with 100Mbps high-speed access support
• 2 CANFD controllers, compatible with CAN 2.0A/B protocol
• External memory controller with SMC support, LCD parallel interface compatible with 8080/6800 mode
• Security features: AES, hash algorithm, TRNG
• Package options: LQFP80, LQFP64, LQFP48, QFN48, QFN32