R5F12018ASP#50

True low-power platform with 54μA/MHz active current at TA = 125°C, pin count 8 to 20, code flash 4 to 8KB, RAM 1KB, voltage 2.4 to 5.5V.

Key features

• Low-power technology: Single supply voltage VDD of 2.4 to 5.5 V, with HALT mode and STOP mode.
• RL78 CPU core: CISC architecture with 3-stage pipeline; minimum instruction execution time ranges from high-speed (0.0625 μs at 16 MHz using the high-speed on-chip oscillator) to low-speed (1.0 μs at 1 MHz); address space of 1 MB; general-purpose registers of (8-bit registers × 8) × 4 banks; on-chip RAM of 1 KB.
• Code flash memory: 4 to 8 KB, block size of 1 KB, erase-before-write only, on-chip debug support, self-programming supported (no boot swap function / flash shield window function).
• Data flash memory: 1 KB, block size of 512 bytes, rewrite unit of 32 bits, no background operation supported (cannot execute instructions from code flash during data flash rewrite), rewrite endurance of 1,000,000 cycles (typical), rewrite voltage VDD of 2.4 to 5.5 V.
• High-speed on-chip oscillator: Selectable from 16 MHz, 8 MHz, 4 MHz, 2 MHz, and 1 MHz; frequency accuracy varies by condition.
• Operating ambient temperature: TA = -40 to +85°C (A: consumer applications), TA = -40 to +105°C (G: industrial applications), TA = -40 to +125°C (M: industrial applications).
• Power management and reset: On-chip selectable power-on reset (SPOR) circuit (3 selectable reset levels, stop setting available).
• Serial interfaces: Simplified SPI (CSI) — 1 to 2 channels; UART — 1 channel; simplified I²C — 1 to 2 channels; I²C — 1 channel.
• Timers: 16-bit timer — 8 channels; 12-bit interval timer — 1 channel; watchdog timer — 1 channel (operable with dedicated low-speed on-chip oscillator).
• A/D converter: 8/10-bit resolution (VDD = 2.4 to 5.5 V); analog inputs — 3 to 11 channels; internal reference voltage — 0.815 V (typical).
• Comparator: 1 to 2 channels; operating modes — high-speed mode and low-speed mode; reference voltage selectable between external and internal.
• I/O ports: 6 to 18 I/O ports (N-channel open-drain output (withstand voltage VDD) — 2 to 9); configurable N-channel open-drain and on-chip pull-up resistors; external interrupt — 8 channels; on-chip clock output / buzzer output controller.
• Others: On-chip BCD correction circuit.