SN74AHC126PWR

The 'AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Applications

• Bus signal buffering
• Three-state line driving

Key features

• Operating VCC range: 2V to 5.5V
• Latch-up performance exceeds 250mA
• Maximum supply voltage range: -0.5V to 7V
• Maximum input voltage range: -0.5V to 7V
• Maximum output voltage range: -0.5V to VCC+0.5V
• Output clamp current range: ±20mA
• Continuous output current range: ±25mA
• Continuous current through VCC or GND: ±50mA
• Thermal impedance by package: D package 86°C/W, DB package 96°C/W, DGV package 127°C/W, N package 80°C/W, NS package 76°C/W, PW package 113°C/W
• Storage temperature range: -65°C to 150°C
• All unused inputs must be connected to VCC or GND to ensure proper device operation
• SN54AHC126 supports J, W, FK packages; SN74AHC126 supports D, DB, DGV, N, NS, PW packages; some pins have no internal connection