TPS51206DSQR

The TPS51206 is a sink/source double data rate (DDR) termination voltage regulator with a VTTREF buffered reference output. This device is specifically designed for space-constrained systems with low input voltage, low cost, and a small number of external components. The TPS51206 can maintain a fast transient response and only requires one 10 μF ceramic output capacitor. The TPS51206 supports the remote sensing function and can meet all the power requirements of DDR2, DDR3, low-power DDR3 (DDR3L), and DDR4 VTT buses. The VTT has a peak current capability of ±2 A. This device supports all DDR power states, putting VTT in a high-impedance state in S3 state (suspend to RAM); discharging VTT and VTTREF in S4/S5 states (suspend to disk). The TPS51206 is available in a 10-pin, 2 mm × 2 mm SON (DSQ) PowerPAD package and is rated for an operating temperature range of -40°C to 85°C.

Applications

• DDR2, DDR3, DDR3L, and DDR4 memory power supply
• SSTL_18, SSTL_15, SSTL_135, and HSTL termination

Key features

• Power supply input voltage: supports 3.3V and 5V rails
• VLDOIN input voltage range: VTT +0.4V to 3.5V
• VTT termination regulator
• Output voltage range: 0.5V to 0.9V
• 2A peak sink and source current
• Only 10μF MLCC output capacitor required
• ±20mV accuracy
• VTTREF buffered reference output VDDQ/2 ±1% accuracy, 10mA sink/source current
• High-impedance state (S3) and soft-stop (S4 and S5) support, selectable via S3 and S5 inputs
• Thermal protection
• 10-pin 2mm×2mm small outline no-lead (SON) (DSQ) package