25LC320A-I/SN

Mid-density 8- through 256-Kbit Serial Electrically Erasable PROMs (EEPROM). The devices are organized in blocks of x8-bit memory and support the Serial Peripheral Interface (SPI) compatible serial bus architecture. Byte-level and page-level functions are supported. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a Chip Select (CS) input. Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.

Key features

• Maximum Clock: 5 MHz
• Low-Power CMOS Technology:
• Write current: 5 mA at 5.5V (maximum)
• Read current: 5 mA at 5.5V, 5 MHz
• Standby current: 10 μA at 5.5V
• 1,024x8 through 32,768x8 -bit Organization
• Byte and Page-Level Write Operations
• Self-Timed Erase and Write Cycles (6 ms maximum)
• Block Write Protection:
• Protect none, 1/4, 1/2 or all of array
• Built-in Write Protection:
• Power-on/off data protection circuitry
• Write enable latch
• Write-protect pin
• Sequential Read
• High Reliability:
• Endurance: >1,000,000 erase/write cycles
• Data retention: >200 years
• ESD protection: >4000 V
• Temperature Range Supported:
• Extended (H): -40℃ to +150℃
• RoHS Compliant
• Automotive AEC-Q100 Qualified