Varnitronics
MICROCHIP

AT32UC3A364S-CTUT

AVR 32 Bit 66MHz FFBGA-144 Microcontrollers RoHS

FFBGA-144ROHS3 CompliantActive

32-bit AVR Microcontroller

Manufacturer
MICROCHIP
Manufacturer part #
AT32UC3A364S-CTUT
Store part #
C1339295
Package / case
FFBGA-144
Packaging
Tray
Datasheet (PDF)

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48 in stock

#C1339295

Stock & price checked 5 days ago

QuantityUnit pricePack price
1+₹2,532.41₹2,532.41
10+₹2,411.38₹24,113.80
30+₹2,201.49₹66,044.70
100+₹2,018.51₹2,01,851.00

1 × ₹2,532.41

₹2,532.41

excl. GST

₹2,988.24 incl. 18% GST

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  • Standard pack: 168 per tray

AT32UC3A364S-CTUT

₹2,532.41 for 1 + GST

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Specifications

ADC (Bit)
10bit
Number of I/O
110
Operating Temperature
-40℃~+85℃
Voltage - Supply
1.75V~3.6V
Program Memory Type
FLASH
Program Storage Size
64KB
CPU Core
AVR
Core Size
32 Bit
CPU Maximum Speed
66MHz
Oscillator Type
Built-in+External

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
5A992C
Packaging
Tray
Standard pack
168 / Tray
Sold per
Piece
Minimum order
1
Unit weight
0.001 g

Overview

The AT32UC3A3/A4 is a complete System-On-Chip microcontroller based on the AVR32 UC RISC processor running at frequencies up to 84MHz. AVR32 UC is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption, high code density and high performance. The processor implements a Memory Protection Unit (MPU) and a fast and flexible interrupt controller for supporting modern operating systems and real-time operating systems. Higher computation capabilities are achievable using a rich set of DSP instructions. The AT32UC3A3/A4 incorporates on-chip Flash and SRAM memories for secure and fast access. 64 KBytes of SRAM are directly coupled to the AVR32 UC for performances optimization. Two blocks of 32 Kbytes SRAM are independently attached to the High Speed Bus Matrix, allowing real ping-pong management. The Peripheral Direct Memory Access Controller (PDCA) enables data transfers between peripherals and memories without processor involvement. The PDCA drastically reduces processing overhead when transferring continuous and large data streams. The Power Manager improves design flexibility and security: the on-chip Brown-Out Detector monitors the power supply, the CPU runs from the on-chip RC oscillator or from one of external oscillator sources, a Real-Time Clock and its associated timer keeps track of the time. The device includes two sets of three identical 16-bit Timer/Counter (TC) channels. Each channel can be independently programmed to perform frequency measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. 16-bit channels are combined to operate as 32-bit channels. The AT32UC3A3/A4 also features many communication interfaces for communication intensive applications like UART, SPI or TWI. The USART supports different communication modes, like SPI Mode and LIN Mode. Additionally, a flexible Synchronous Serial Controller (SSC) is available. The SSC provides easy access to serial communication protocols and audio standards like I2S. The AT32UC3A3/A4 includes a powerfull External Bus Interface to interface all standard memory device like SRAM, SDRAM, NAND Flash or parallel interfaces like LCD Module. The peripheral set includes a High Speed MCI for SDIO/SD/MMC and a hardware encryption module based on AES algorithm. The device embeds a 10-bit ADC and a Digital Audio bistream DAC. The Direct Memory Access controller (DMACA) allows high bandwidth data flows between high speed peripherals (USB, External Mem

Key features

  • High Performance, Low Power 32-bit Atmel AVR Microcontroller
  • Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set
  • Read-Modify-Write Instructions and Atomic Bit Manipulation
  • Performing up to 1.51DMIPS/MHz
  • Up to 126 DMIPS Running at 84MHz from Flash (1 Wait-State)
  • Up to 63 DMIPS Running at 42MHz from Flash (0 Wait-State)
  • Memory Protection Unit
  • Multi-Layer Bus System
  • High-Performance Data Transfers on Separate Buses for Increased Performance
  • 8 Peripheral DMA Channels (PDCA) Improves Speed for Peripheral Communication
  • 4 generic DMA Channels for High Bandwidth Data Paths
  • Internal High-Speed Flash
  • 256KBytes, 128KBytes, 64KBytes versions
  • Single-Cycle Flash Access up to 36MHz
  • Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
  • 4 ms Page Programming Time and 8ms Full-Chip Erase Time
  • 100,000 Write Cycles, 15-year Data Retention Capability
  • Flash Security Locks and User Defined Configuration Area
  • Internal High-Speed SRAM
  • 64KBytes Single-Cycle Access at Full Speed, Connected to CPU Local Bus
  • 64KBytes (2x32KBytes with independent access) on the Multi-Layer Bus System
  • Interrupt Controller
  • Autovectored Low Latency Interrupt Service with Programmable Priority
  • System Functions
  • Power and Clock Manager Including Internal RC Clock and One 32KHz Oscillator
  • Two Multipurpose Oscillators and Two Phase-Lock-Loop (PLL)
  • Watchdog Timer, Real-Time Clock Timer
  • External Memories
  • Support SDRAM, SRAM, NandFlash (1-bit and 4-bit ECC), Compact Flash
  • Up to 66 MHz
  • External Storage device support
  • MultiMediaCard (MMC V4.3), Secure-Digital (SD V2.0), SDIO V1.1
  • CE-ATA V1.1, FastSD, SmartMedia, Compact Flash
  • Memory Stick: Standard Format V1.40, PRO Format V1.00, Micro
  • IDE Interface
  • One Advanced Encryption System (AES) for AT32UC3A3256S, AT32UC3A3128S, AT32UC3A364S, AT32UC3A4256S, AT32UC3A4128S and AT32UC3A364S
  • 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications
  • Buffer Encryption/Decryption Capabilities
  • Universal Serial Bus (USB)
  • High-Speed USB 2.0 (480Mbit/s) Device and Embedded Host
  • Flexible End-Point Configuration and Management with Dedicated DMA Channels
  • On-Chip Transceivers Including Pull-Ups
  • One 8-channel 10-bit Analog-To-Digital Converter, multiplexed with Digital IOs.
  • Two Three-Channel 16-bit Timer/Counter (TC)
  • Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
  • Fractionnal Baudrate Generator
  • Support for SPI and LIN
  • Optionnal support for IrDA, ISO7816, Hardware Handshaking, RS485 interfaces and Modem Line
  • Two Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signal
  • One Synchronous Serial Protocol Controller
  • Supports I2S and Generic Frame-Based Protocols
  • Two Master/Slave Two-Wire Interface (TWI), 400kbit/s I2C-compatible
  • 16-bit Stereo Audio Bitstream
  • Sample Rate Up to 50 KHz
  • QTouch Library Support
  • Capacitive Touch Buttons, Sliders, and Wheels
  • QTouch and QMatrix Acquisition
  • 110 General Purpose Input/Output (GPIOs)
  • Standard or High Speed mode
  • Toggle capability: up to 84MHz
  • Single 3.3V Power Supply

Alternatives

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