AT45DB041E-MHN-Y

Key features

• Single 1.65 V – 3.6 V supply voltage
• SPI compatible
• Supports SPI modes 0 and 3
• Supports RapidS™ operation
• Continuous read of entire array
• Up to 85 MHz
• Low power read option up to 15 MHz
• Clock-to-output time (tV) 6 ns maximum
• User-configurable page size
• 256 bytes per page
• 264 bytes per page (default)
• Factory pre-configurable page size of 256 bytes
• Two fully independent SRAM data buffers (256/264 bytes)
• Allows receipt of data during reprogramming of main memory array
• Flexible programming options
• Byte/page programming (1 to 256/264 bytes) with direct write to main memory
• Buffer write
• Buffer to main memory page programming
• Flexible erase options
• Page erase (256/264 bytes)
• Block erase (2 kB)
• Sector erase (64 kB)
• Chip erase (4 Mbit)
• Program and erase suspend/resume
• Advanced hardware and software data protection
• Individual sector protection
• Individual sector lockdown for permanent read-only sectors
• 128-byte one-time programmable (OTP) security register
• 64 bytes factory programmed with unique identifier
• 64 bytes user programmable
• Hardware and software controlled reset options
• JEDEC-compliant manufacturer and device ID read
• Low power consumption
• 400 nA ultra-deep power-down current (typical)
• 3 μA deep power-down current (typical)
• 25 μA standby current (typical)
• 7 mA active read current (typical at 15 MHz)
• Endurance:
• 100,000 program/erase cycles at -40°C to +85°C
• 10,000 program/erase cycles at -40°C to +125°C
• Data retention: 20 years
• Full industrial temperature range compliant
• Green (lead-free/halogen-free/RoHS compliant) package options
• 8-lead SOIC (150-mil wide and 208-mil wide)
• 8-pad ultra-thin DFN (5×6×0.6 mm)
• Die in wafer form (contact factory for availability)