AT91SAM7S256D-AU

Atmel’s SAM7S is a series of low pincount Flash microcontrollers based on the 32-bit ARM RISC processor. It features a high-speed Flash and an SRAM, a large set of peripherals, including a USB 2.0 device (except for the SAM7S32 and SAM7S16), and a complete set of system functions minimizing the number of external components. The device is an ideal migration path for 8-bit microcontroller users look

Key features

• Incorporates the ARM7TDMI ARM Thumb Processor
• High-performance 32-bit RISC Architecture
• High-density 16-bit Instruction Set
• Leader in MIPS/Watt
• EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
• Internal High-speed Flash – 512 Kbytes (SAM7S512) Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes (Dual Plane) – 256 Kbytes (SAM7S256) Organized in 1024 Pages of 256 Bytes (Single Plane) – 128 Kbytes (SAM7S128) Organized in 512 Pages of 256 Bytes (Single Plane) – 64 Kbytes (SAM7S64) Organized in 512 Pages of 128 Bytes (Single Plane) – 32 Kbytes (SAM7S321/32) Organized in 256 Pages of 128 Bytes (Single Plane) – 16 Kbytes (SAM7S161/16) Organized in 256 Pages of 64 Bytes (Single Plane) – Single Cycle Access at Up to 30 MHz in Worst Case Conditions – Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed – Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms – 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit – Fast Flash Programming Interface for High Volume Production
• Internal High-speed SRAM, Single-cycle Access at Maximum Speed – 64 Kbytes (SAM7S512/256) – 32 Kbytes (SAM7S128) – 16 Kbytes (SAM7S64) – 8 Kbytes (SAM7S321/32) – 4 Kbytes (SAM7S161/16)
• Memory Controller (MC) – Embedded Flash Controller, Abort Status and Misalignment Detection
• Reset Controller (RSTC) – Based on Power-on Reset and Low-power Factory-calibrated Brown-out Detector – Provides External Reset Signal Shaping and Reset Source Status
• Clock Generator (CKGR) – Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
• Power Management Controller (PMC) – Software Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode – Three Programmable External Clock Signals
• Advanced Interrupt Controller (AIC) – Individually Maskable, Eight-level Priority, Vectored Interrupt Sources – Two (SAM7S512/256/128/64/321/161) or One (SAM7S32/16) External Interrupt Source(s) and One Fast Interrupt Source, Spurious Interrupt Protected
• Debug Unit (DBGU) – 2-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention – Mode for General Purpose 2-wire UART Serial Communication
• Periodic Interval Timer (PIT) – 20-bit Programmable Counter plus 12-bit Interval Counter
• Windowed Watchdog (WDT) – 12-bit key-protected Programmable Counter – Provides Reset or Interrupt Signals to the System – Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
• Real-time Timer (RTT) – 32-bit Free-running Counter with Alarm – Runs Off the Internal RC Oscillator
• One Parallel Input/Output Controller (PIOA) – Thirty-two (SAM7S512/256/128/64/321/161) or twenty-one (SAM7S32/16) Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os – Input Change Interrupt Capability on Each I/O Line – Individually Programmable Open-drain, Pull-up resistor and Synchronous Output
• Eleven (SAM7S512/256/128/64/321/161) or Nine (SAM7S32/16) Peripheral DMA Controller (PDC) Channels
• One USB 2.0 Full Speed (12 Mbits per Second) Device Port (Except for the SAM7S32/16). – On-chip Transceiver, 328-byte Configurable Integrated FIFOs
• One Synchronous Serial Controller (SSC) – Independent Clock and Frame Sync Signals for Each Receiver and Transmitter – I²S Analog Interface Support, Time Division Multiplex Support – High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Two (SAM7S512/256/128/64/321/161) or One (SAM7S32/16) Universal Synchronous/Asynchronous Receiver Transmitters (USART) – Individual Baud Rate Generator, rDA Infrared Modulation/Demodulation – Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support – Full Modem Line Support on USART1 (SAM7S512/256/128/64/321/161)
• One Master/Slave Serial Peripheral Interface (SPI) – 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
• One Three-channel 16-bit Timer/Counter (TC) – Three External Clock Input and Two Multi-purpose I/O Pins per Channel (SAM7S512/256/128/64/321/161) – One External Clock Input and Two Multi-purpose I/O Pins for the first Two Channels Only (SAM7S32/16) – Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
• One Four-channel 16-bit PWM Controller (PWMC)
• One Two-wire Interface (TWI) – Master Mode Support Only, All Two-wire Atmel EEPROMs and |²c Compatible Devices Supported (SAM7S512/256/128/64/321/32) – Master, Multi-Master and Slave Mode Support, All Two-wire Atmel EEPROMs and |²c Compatible Devices Supported (SAM7S161/16)
• SAM-BA Boot Assistant – Default Boot program – Interface with SAM-BA Graphic User Interface IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
• 5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each (SAM7S161/16 I/Os Not 5V-tolerant)
• Power Supplies – Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components – 3.3V or 1.8V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply – 1.8V VDDCORE Core Power Supply with Brown-out Detector
• Fully Static Operation: Up to 55 MHz at 1.65V and 85℃ Worst Case Conditions
• Available in 64-lead LQFP Green or 64-pad QFN Green Package (SAM7S512/256/128/64/321/161) and 48-lead LQFP Green or 48-pad QFN Green Package (SAM7S32/16)