AT93C56B-SSHM-T

The AT93C56B/66B provides 2,048/4,096 bits of Serial Electrically Erasable Programmable Read-Only Memory (EEPROM) organized as 128/256 words of 16 bits each (when the ORG pin is connected to VCC) and 256/512 words of 8 bits each (when the ORG pin is tied to ground). The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operations are essential. The AT93C56B/66B is available in space-saving 8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 8-pad XDFN, and 8-ball VFBGA packages. The AT93C56B/66B is enabled through the Chip Select pin (CS) and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a Read instruction at DI, the address is decoded, and the data is clocked out serially on the DO pin. The write cycle is completely self-timed, and no separate erase cycle is required before Write. The write cycle is only enabled when the part is in the Erase/Write Enable state. When CS is brought high following the initiation of a write cycle, the DO pin outputs the Ready/Busy status of the part. The AT93C56B/66B operates from 1.7V to 5.5V.

Key features

• Low-voltage Operation VCC = 1.7V to 5.5V
• User-selectable Internal Organization 2K: 256x8 or 128x16 4K: 512x8 or 256x16
• 3-wire Serial Interface
• Sequential Read Operation
• 2MHz Clock Rate (5V)
• Self-timed Write Cycle (5ms Max)
• High Reliability Endurance: 1,000,000 Write Cycles
• Data Retention: 100 Years
• 8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 8-pad XDFN, and 8-ball VFBGA packages