ATMEGA8535L-8AU

The ATmega8535 is a low- power CMOS 8- bit microcontroller based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the ATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers. The ATmega8535 provides the following features: 8K bytes of In- System Programmable Flash with Read- While- Write capabilities, 512 bytes EEPROM, 512 bytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte oriented Two- wire Serial Interface, an 8- channel, 10- bit ADC with optional differential input stage with programmable gain in TQFP package, a programmable Watchdog Timer with Internal Oscillator, an SPI serial port, and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power- down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. In Power- save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start- up combined with low- power consumption. In Extended Standby mode, both the main Oscillator and the asynchronous timer continue to run. The device is manufactured using Atmel's high density nonvolatile memory technology. The On- chip ISP Flash allows the program memory to be reprogrammed In- System through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On- chip Boot program running on the AVR core. The boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read- While- Write operation. By combining an 8- bit RISC CPU with In- System Self- Programmable Flash on a monolithic chip, the Atmel ATmega8535 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The ATmega8535 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, In- Circuit Emulators, and evaluation kits.

Key features

• High-performance, Low-power AVR 8-bit Microcontroller- Advanced RISC Architecture
• 130 Powerful Instructions
• Most Single Clock Cycle Execution
• 32 x 8 General Purpose Working Registers
• Fully Static Operation
• Up to 16 MIPS Throughput at 16 MHz
• On-chip 2-cycle Multiplexer-Nonvolatile Program and Data Memories
• 8K Bytes of In-System Self-Programmable Flash Endurance: 10,000 Write/Erase Cycles
• Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program True Read-While-Write Operation
• 512 Bytes EEPROM Endurance: 100,000 Write/Erase Cycles
• 512 Bytes Internal SRAM
• Programming Lock for Software Security
• Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
• One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
• Real Time Counter with Separate Oscillator
• Four PWM Channels
• 8-channel, 10-bit ADC
• 8 Single-ended Channels
• 7 Differential Channels for TQFP Package Only
• 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x for TQFP Package Only
• Byte-oriented Two-wire Serial Interface
• Programmable Serial USART
• Master/Slave SPI Serial Interface
• Programmable Watchdog Timer with Separate On-chip Oscillator
• On-chip Analog Comparator
• Power-on Reset and Programmable Brown-out Detection
• Internal Calibrated RC Oscillator
• External and Internal Interrupt Sources
• Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby
• 32 Programmable I/O Lines
• 40-pin PDIP, 44-lead TQFP, 44-lead PLCC, and 44-pad QFN/MLF
• 2.7 - 5.5V for ATmega8535L
• 4.5 - 5.5V for ATmega8535
• 0 - 8 MHz for ATmega8535L
• 0 - 16 MHz for ATmega8535