ATXMEGA128A1-CU

The Atmel AVR XMEGA is a family of low power, high performance, and peripheral rich 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the AVR XMEGA devices achieve CPU throughput approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power consumption versus processing speed. The Atmel AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in a single instruction, executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs many times faster than conventional single-accumulator or CISC based microcontrollers. The AVR XMEGA A1 devices provide the following features: in-system programmable flash with read-while-write capabilities; internal EEPROM and SRAM; four-channel DMA controller, eight-channel event system and programmable multilevel interrupt controller, 78 general purpose I/O lines, 16-bit real-time counter (RTC); eight flexible, 16-bit timer/counters with compare and PWM channels, eight USARTs; four two-wire serial interfaces (TWIs); four serial peripheral interfaces (SPIs); AES and DES cryptographic engine; two 16-channel, 12-bit ADCs with programmable gain; two 2-channel, 12-bit DACs; four Analog Comparators (ACs) with window mode; programmable watchdog timer with separate internal oscillator; accurate internal oscillators with PLL and prescaler; and programmable brown-out detection. The program and debug interface (PDI), a fast, two-pin interface for programming and debugging, is available. The devices also have an IEEE std. 1149.1 compliant JTAG interface, and this can also be used for boundary scan, on-chip debug and programming. The XMEGA A1 devices have five software selectable power saving modes. The idle mode stops the CPU while allowing the SRAM, DMA controller, event system, interrupt controller, and all peripherals to continue functioning. The powerdown mode saves the SRAM and register contents, but stops the oscillators, disabling all other functions until the next TWI or pin-change interrupt, or reset. In power-save mode, the asynchronous real-time counter continues to run, allowing the application to maintain a timer base while the rest of the device is sleeping. In standby mode, the external crystal oscillator keeps running while the rest of the device is sleeping. This allows very fast startup from the external crystal, combined with low power consumption. In extended standby mode, both the main oscillator and the asynchronous timer continue to run. To further reduce power consumption, the peripheral clock to each individual peripheral can optionally be stopped in active mode and idle sleep mode. Atmel offers a free QTouch library for embedding capacitive touch buttons, sliders and wheels functionality into AVR microcontrollers. The device are manufactured using Atmel high-density, nonvolatile memory technology. The program flash memory can be reprogrammed in-system through the PDI or JTAG interfaces. A boot loader

Key features

• High-performance, low-power Atmel AVR XMEGA 8/16-bit Microcontroller Nonvolatile program and data memories
• 64K - 128KBytes of in-system self-programmable flash
• 4K - 8KBytes boot section
• 2 KBBytes EEPROM
• 4 KB - 8 KBBytes internal SRAM
• External bus interface for up to 16Mbytes SRAM
• External bus interface for up to 128Mbit SDRAM
• Four-channel DMA controller
• Eight-channel event system
• Eight 16-bit timer/counters
• Four timer/counters with 4 output compare or input capture channels
• Four timer/counters with 2 output compare or input capture channels
• High resolution extension on all timer/counters
• Advanced waveform extension (AWeX) on two timer/counters
• Eight USARTs with IrDA support for one USART
• Four two-wire interfaces with dual address match ( I²C and SMBus compatible)
• Four serial peripheral interfaces (SPIs)
• AES and DES crypto engine
• 16-bit real time counter (RTC) with separate oscillator
• Two sixteen channel, 12-bit, 2msps Analog to Digital Converters
• Two two-channel, 12-bit, 1msps Digital to Analog Converters
• Four Analog Comparators (ACs) with window compare function, and current sources
• External interrupts on all general purpose I/O pins
• Programmable watchdog timer with separate on-chip ultra low power oscillator
• QTouch library support
• Capacitive touch buttons, sliders and wheels
• Power-on reset and programmable brown-out detection
• Internal and external clock options with PLL and prescaler
• Programmable multilevel interrupt controller
• Five sleep modes
• Programming and debug interfaces
• JTAG (IEEE 1149.1 compliant) interface, including boundary scan
• PDI (Program and Debug Interface)
• 78 Programmable I/O pins
• 100 lead TQFP
• 100 ball BGA
• 100 ball VFBGA
• Operating voltage: 1.6 – 3.6V
• Operating frequency: 0 – 12MHz from 1.6V; 0 – 32MHz from 2.7V