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dsPIC33EP64GS502-I/MM MICROCHIP
MICROCHIP

dsPIC33EP64GS502-I/MM

QFN-28-EP(6x6) Microcontrollers RoHS

QFN-28-EP(6x6)ROHS3 CompliantActive

16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators

Manufacturer
MICROCHIP
Manufacturer part #
dsPIC33EP64GS502-I/MM
Store part #
C639677
Package / case
QFN-28-EP(6x6)
Packaging
Tube-packed
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

3 in stock

#C639677

Stock & price checked 21 h ago

QuantityUnit pricePack price
1+₹1,173.05₹1,173.05
10+₹1,146.27₹11,462.70
30+₹1,128.43₹33,852.90
100+₹1,110.58₹1,11,058.00

1 × ₹1,173.05

₹1,173.05

excl. GST

₹1,384.20 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 15-18 working days
  • GST invoice with every order
  • Standard pack: 61 per tube

dsPIC33EP64GS502-I/MM

₹1,173.05 for 1 + GST

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Specifications

Operating Temperature
-40℃~+85℃

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
3A991A2
Packaging
Tube-packed
Standard pack
61 / Tube
Sold per
Piece
Minimum order
1
Unit weight
1.12 g

Overview

Applications

  • AC/DC
  • DC/DC
  • Inverters
  • PFC
  • Lighting

Key features

  • 3.0V to 3.6V, -40°C to +85°C, DC to 70 MIPS; 3.0V to 3.6V, -40°C to +125°C, DC to 60 MIPS
  • Dual Partition Flash Program Memory with Live Update (64-Kbyte devices): Supports programming while operating; Supports partition soft swap
  • Code-Efficient (C and Assembly) Architecture
  • Two 40-Bit Wide Accumulators
  • Single-Cycle (MAC/MPY) with Dual Data Fetch
  • Single-Cycle Mixed-Sign MUL Plus Hardware Divide
  • 32-Bit Multiply Support
  • Two Additional Working Register Sets (reduces context switching)
  • ±0.9% Internal Oscillator
  • Programmable PLLs and Oscillator Clock Sources
  • Fail-Safe Clock Monitor (FSCM)
  • Independent Watchdog Timer (WDT)
  • Fast Wake-up and Start-up
  • Low-Power Management modes (Sleep, Idle, Doze)
  • Integrated Power-on Reset and Brown-out Reset
  • 0.5 mA/MHz Dynamic Current (typical)
  • 10 μA IPD Current (typical)
  • Five PWM Generators (two outputs per generator)
  • Individual Time Base and Duty Cycle for each PWM
  • 1.04 ns PWM Resolution (frequency, duty cycle, dead time and phase)
  • Supports Center-Aligned, Redundant, Complementary and True Independent Output modes
  • Independent Fault and Current-Limit Inputs
  • Output Override Control
  • PWM Support for AC/DC, DC/DC, Inverters, PFC and Lighting
  • High-Speed ADC module: 12-bit with 4 dedicated SAR ADC cores and one shared SAR ADC core; Configurable resolution (up to 12-bit) for each ADC core; Up to 3.25 Msps conversion rate per channel at 12-bit resolution; 12 to 22 single-ended inputs; Dedicated result buffer for each analog channel; Flexible and independent ADC trigger sources; Two digital comparators; Two oversampling filters for increased resolution
  • Four Rail-to-Rail Comparators with Hysteresis: Dedicated 12-bit Digital-to-Analog Converter (DAC) for each analog comparator; Up to two DAC reference outputs; Up to two external reference inputs
  • Two Programmable Gain Amplifiers: Single-ended or independent ground reference; Five selectable gains (4x, 8x, 16x, 32x and 64x); 40 MHz gain bandwidth
  • Reduces CPU Interaction to Improve Performance
  • Flexible PWM Trigger Options for ADC Conversions
  • High-Speed Comparator Truncates PWM (15 ns typical): Supports Cycle-by-Cycle Current mode control; Current Reset mode (variable frequency)
  • Five 16-Bit and up to Two 32-Bit Timers/Counters
  • Four Output Compare (OC) modules, Configurable as Timers/Counters
  • Four Input Capture (IC) modules
  • Two UART modules (15 Mbps): Supports LIN/J2602 protocols and IrDA; Two 4-Wire SPI modules (15 Mbps)
  • Two I²C modules (up to 1 Mbaud) with SMBus Support
  • Constant-Current Source (10 μA nominal)
  • Sink/Source up to 12mA/15mA, respectively; Pin-Specific for Standard VOH/VOL
  • 5V Tolerant Pins
  • Selectable, Open-Drain Pull-ups and Pull-Downs
  • External Interrupts on All I/O Pins
  • Peripheral Pin Select (PPS) to allow Function Remap with Six Virtual I/Os
  • AEC-Q100 REVG (Grade 1, -40°C to +125°C)
  • Class B Safety Library, IEC 60730
  • The 6x6x0.5 mm UQFN Package is Designed and Optimized to ease IPC9592B 2nd Level Temperature Cycle Qualification
  • In-Circuit and In-Application Programming
  • Five Program and Three Complex Data Breakpoints
  • IEEE 1149.2 Compatible (JTAG) Boundary Scan
  • Trace and Run-Time Watch

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