GD25LB256EYIGR

The GD25LB256E (256M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the Quad SPI and DTR mode: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#), I/O3, and RESET#. The Quad output data is transferred with speed of 664Mbits/s, the Quad I/O data is transferred with speed of 532Mbits/s, and the DTR Quad I/O data is transferred with speed of 832Mbits/s.

Key features

• 256M-bit Serial Flash - 32M-Byte - 256 Bytes per programmable page
• Standard, Quad SPI, DTR, QPI
• Standard SPI: SCLK, CS#, SI, SO, WP#, RESET#
• Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3, RESET#
• QPI: SCLK, CS#, IO0, IO1, IO2, IO3, RESET#
• SPI DTR (Double Transfer Rate) Read
• 3 or 4-Byte Address Mode
• Fast Program/Erase Speed
• Page Program time: 0.3ms typical
• Sector Erase time: 30ms typical
• Block Erase time: 0.1/0.2s typical
• Chip Erase time: 50s typical
• Allows XIP (eXecute in Place) Operation
• High speed Read reduce overall XiP instruction fetch time
• Continuous Read with Wrap further reduce data latency to fill up SoC cache
• High Speed Clock Frequency
• 166MHz for fast read
• Quad I/O Data transfer up to 532Mbits/s
• QPI Mode Data transfer up to 532Mbits/s
• DTR Quad I/O Data transfer up to 832Mbits/s
• Flexible Architecture
• Sector of 4K-Byte
• Block of 32/64K-Byte
• Erase/Program Suspend/Resume
• Software/Hardware Write Protection
• Write protect all/portion of memory via software
• Enable/Disable protection with WP# Pin
• Individual Block Protection
• Low Power Consumption
• 20μA typical stand-by current
• 2μA typical power-down current
• Advanced Security Features
• 128-bit Unique ID
• 4K-Byte Security Registers With OTP Lock
• Single Power Supply Voltage
• Full voltage range: 1.65~2.0V
• Endurance and Data Retention
• Minimum 100,000 Program/Erase Cycles
• 20-year data retention typical
• Package Information
• SOP16 300mil
• WSON8 (8x6mm)
• WSON8 (6x5mm)
• TFBGA-24ball (5x5 Ball Array)
• WLCSP 4-4 ball array
• WLCSP 3-2-3 ball array