HC32F155KCTH-LQFP64

The HC32F155 series is a high-performance MCU based on the ARM® Cortex®-M0+ 32-bit RISC CPU, operating at up to 32MHz. The Cortex-M0+ core supports a 2-stage pipeline with a computational performance of 0.95 Dhrystone MIPS/MHz, and the hardware debug circuit supports TOOL0 single-wire debugging. The HC32F155 series integrates on-chip memory, including up to 256KB Flash + 1KB dedicated data Flash and up to 32KB SRAM. An integrated Flash access prefetch acceleration unit improves Flash access efficiency. Inter-peripheral event triggering is supported, significantly reducing CPU transaction processing overhead. The HC32F155 series integrates a rich set of peripheral features, including up to 14-channel 12-bit 1MSPS ADC, 8 multi-function 16-bit Timers (TimerB) supporting input capture, output compare, and PWM output, 1 16-bit Timer (Timer0) supporting asynchronous counting, 1 I2C interface, 1 SPI interface, and 6 USART interfaces, one of which supports LIN communication. The HC32F155 series supports a wide voltage range (2.7–5.5V), wide temperature range (-40–85℃), and low-power modes, making it suitable for applications such as home appliance control and smart hardware.

Applications

• Home appliance control
• Smart hardware

Key features

• ARMv6-M architecture 32-bit Cortex-M0+ CPU, up to 32MHz operating frequency
• Up to 256KByte Flash with security protection, 1KByte dedicated data Flash, up to 32KByte SRAM
• System supply voltage (VDD) range 2.7–5.5V, 4 independent clock sources, 8 reset sources
• Low-power operation support, independent peripheral enable/disable, Sleep and Stop low-power modes
• Peripheral event cross-triggering to reduce CPU load, 2-channel DMA with independently selectable trigger sources per channel
• Up to 14-channel 12-bit 1MSPS ADC, single/scan conversion, Timer event-triggered conversion start
• 8× multi-function 16-bit general-purpose Timer (TimerB) with input capture, output compare, and PWM output; 1× 16-bit general-purpose Timer (Timer0) with asynchronous counting; hardware RTC with 1ppm-level error calibration
• GPIO count varies by package: up to 28 GPIO (LQFP32), up to 40 GPIO (LQFP44), up to 44 GPIO (LQFP48), up to 58 GPIO (LQFP64)
• Maximum I/O drive capability: IOL 20mA, IOH 10mA
• Up to 8 communication interfaces: 6× USART (1× UART with LIN bus protocol support, full-duplex and half-duplex asynchronous communication); 1× I2C supporting 7-bit/10-bit addressing; 1× SPI supporting 16-bit data width
• 96-bit global Unique ID support