M430FR5989SRGCREP

MSP430 ULP FRAM platform combines unique embedded FRAM and overall ultra-low power system architecture, enabling innovators to increase performance with a smaller energy budget. FRAM technology combines the speed, flexibility, and durability of SRAM with the stability and reliability of flash memory at much lower power consumption. The MSP430 ULP FRAM product family consists of a variety of devices and intelligent peripherals using FRAM and ULP 16-bit MSP430 CPU, suitable for various applications. The ULP architecture has seven low-power modes, which are optimized to achieve a longer battery life in energy-constrained applications. As a high-reliability enhanced product, this device has a controlled baseline, an extended temperature range (-55℃ to 95℃), and a gold wire-bonded package, making it particularly suitable for mission-critical applications.

Applications

• Water meters
• Heat meters
• Heat cost allocators
• Portable medical instruments
• Data loggers

Key features

• Embedded microcontroller
• 16-bit RISC architecture up to 16 MHz clock frequency
• Wide supply voltage range (1.8V to 3.6V); minimum power-on supply voltage required per SVSₕ power-on level: 1.99V
• Optimized ultra-low-power modes
• Active mode: ~100µA/MHz
• Standby (LPM3 with VLO): 0.4µA (typical)
• RTC (LPM3.5): 0.35µA (typical)
• Shutdown (LPM4.5): 0.02µA (typical)
• Ultra-low-power FRAM
• Up to 128KB non-volatile memory
• Ultra-low-power write; 125ns fast write per word (64KB written in 4ms)
• Unified memory = program + data + storage in a single space
• 10¹⁵ write cycle endurance
• Radiation-resistant and non-magnetic
• 32-bit hardware multiplier (MPY)
• Three-channel internal DMA
• RTC with calendar and alarm functions
• Five 16-bit timers, each with up to 7 capture/compare registers
• 16-bit and 32-bit CRC (CRC16, CRC32)
• Versatile I/O ports
• All P1–P10 and PJ pins support capacitive touch sensing with no external components
• Per-bit, per-byte, and per-word (paired) access
• LPM wake-up via P1, P2, P3, and P4 ports with selectable edge
• Programmable pull-up and pull-down on all ports
• Code security
• True random number seed for random number generation algorithms
• Enhanced serial communication
• eUSCI_A0 and eUSCI_A1 support:
• UART with automatic baud rate detection
• IrDA encode and decode
• SPI
• eUSCI_B0 and eUSCI_B1 both support:
• I²C with multi-slave addressing
• SPI
• Hardware UART and I²C bootloader (BSL)
• DCO with 10 selectable factory-trimmed frequencies
• VLO low-power low-frequency internal clock source
• 32kHz crystal oscillator (LFXT)
• High-frequency crystal oscillator (HFXT)
• High-performance analog
• 16-channel analog comparator
• 12-bit ADC with internal reference, sample-and-hold, and up to 16 external input channels
• Integrated LCD driver with up to 320-segment contrast control