MAX32630IWG+T

The MAX32630/MAX32631 is an ARM Cortex -M4F 32-bit microcontroller with a floating point unit, ideal for the emerging category of wearable medical and fitness applications. The architecture combines ultra-low power high-efficiency signal processing functionality with significantly reduced power consumption and ease of use. The device features four powerful and flexible power modes. A peripheral management unit (PMU) enables intelligent peripheral control with up to six channels to significantly reduce power consumption. Built-in dynamic clock gating and firmware-controlled power gating allows the user to optimize power for the specific application. Multiple SPI, UART and I2C serial interfaces, as well as 1-Wire master and USB, allow for interconnection to a wide variety of external sensors. A four-input, 10-bit ADC with selectable references is available to monitor analog input from external sensors and meters. The small 100-ball WLP package provides a tiny, 4.37mm×4.37mm footprint. The MAX32630/MAX32631 include a hardware AES engine. The MAX32631 is a secure version of the MAX32630. It incorporates a trust protection unit (TPU) with encryption and advanced security features. These features include a modular arithmetic accelerator (MAA) for fast ECDSA, a hardware PRNG entropy generator, and a secure boot loader.

Applications

• Sports Watches
• Fitness Monitors
• Wearable Medical Patches
• Portable Medical Devices
• Sensor Hubs

Key features

• Internal Oscillator Operates Up to 96MHz
• Low Power 4MHz Oscillator System Clock Option for Always-On Monitoring Applications
• 2MB Flash Memory
• 512KB SRAM
• 8KB Instruction Cache
• 1.2V Core Supply Voltage
• 1.8V to 3.3V I/O
• Optional 3.3V±5% USB Supply Voltage
• Power Management Maximizes Uptime for Battery Applications
• 106μA/MHz Active Current Executing from Cache
• Wakeup to 96MHz Clock or 4MHz Clock
• 600nA Low Power Mode (LP0) Current with RTC Enabled
• 3.5μW Ultra-Low Power Data Retention Sleep Mode (LP1) with Fast 5μs Wakeup to 96MHz
• Optimal Peripheral Mix Provides Platform Scalability
• SPIX Execute in Place (XIP) Engine for Memory Expansion with Minimal Footprint
• Three SPI Masters, One SPI Slave
• Four UARTs
• Three I2C Masters, One I2C Slave
• 1-Wire Master
• Full-Speed USB 2.0 Engine with Internal Transceiver
• Sixteen Pulse Train (PWM) Engines
• Six 32-Bit Timers and 3 Watchdog Timers
• Up to 66 General-Purpose I/O Pins
• One 10-Bit Delta-Sigma ADC Operating at 7.8ksps
• AES-64, -128, -256
• CMOS-Level 32kHz RTC Output
• Secure Valuable IP and Data with Robust Internal Hardware Security (MAX32631 Only)
• Trust Protection Unit (TPU) Including MAA Supports ECDSA and Modular Arithmetic
• PRNG Seed Generator
• Secure Boot Loader