MCF52258AG80

The MCF52259 microcontroller family (MCF52252, MCF52254, MCF52255, MCF52256, MCF52258, and MCF52259 devices) is a member of the ColdFire family of reduced instruction set computing (RISC) microprocessors. This 32-bit device is based on the Version 2 ColdFire core operating at a frequency up to 80 MHz, offering high performance and low power consumption. On-chip memories connected tightly to the processor core include up to 512 KB of flash memory and 64 KB of static random access memory (SRAM). On-chip modules include: • V2 ColdFire core delivering 76 MIPS (Dhrystone 2.1) at 80 MHz running from internal flash memory with Enhanced Multiply Accumulate (MAC) Unit and hardware divider • Cryptography Acceleration Unit (CAU). • Fast Ethernet controller (FEC) • Mini-FlexBus external bus interface available on 144 pin packages • Universal Serial Bus On-The-Go (USBOTG) • USB Transceiver • FlexCAN controller area network (CAN) module • Three universal asynchronous/synchronous receiver/transmitters (UARTs) • Two inter-integrated circuit (I2C) bus interface modules Queued serial peripheral interface (QSPI) module Eight-channel 12-bit fast analog-to-digital converter (ADC) with simultaneous sampling • Four-channel direct memory access (DMA) controller • Four 32-bit input capture/output compare timers with DMA support (DTIM) • Four-channel general-purpose timer (GPT) capable of input capture/output compare, pulse width modulation (PWM), pulse-code modulation (PCM), and pulse accumulation Eight-channel/Four-channel, 8-bit/16-bit pulse width modulation timer • Two 16-bit periodic interrupt timers (PITs) • Real-time clock (RTC) module with 32 kHz crystal • Programmable software watchdog timer Secondary watchdog timer with independent clock • Interrupt controller capable of handling 57 sources Clock module with 8 MHz on-chip relaxation oscillator and integrated phase-locked loop (PLL) • Test access/debug port (JTAG, BDM)

Key features

• Version 2 ColdFire variable-length RISC processor core Static operation 32-bit address and data paths on-chip
• Up to 80 MHz processor core frequency, 40 MHz or 33 MHz peripheral bus frequency
• Sixteen general-purpose, 32-bit data and address registers
• Implements ColdFire ISA_A with extensions to support the user stack pointer register and four new instructions for improved bit processing (ISA_A+)
• Enhanced Multiply-Accumulate (EMAC) unit with four 32-bit accumulators to support 16×16→32 or 32×32→48 operations
• Cryptographic Acceleration Unit (CAU) Tightly-coupled coprocessor to accelerate software-based encryption and message digest functions Support for DES, 3DES, AES, MD5, and SHA-1 algorithms
• On-chip memories: Up to 64 KB dual-ported SRAM on CPU internal bus, supporting core, DMA, and USB access with standby power supply support for the first 16 KB; Up to 512 KB of interleaved flash memory supporting 2-1-1-1 accesses
• Power management: Fully static operation with processor sleep and whole chip stop modes; Rapid response to interrupts from the low-power sleep mode (wake-up feature); Clock enable/disable for each peripheral when not used (except backup watchdog timer); Software controlled disable of external clock output for low-power consumption
• FlexCAN 2.0B module: Based on and includes all existing features of the Freescale TouCAN module; Full implementation of the CAN protocol specification version 2.0B – Standard data and remote frames (up to 109 bits long); Extended data and remote frames (up to 127 bits long); Zero to eight bytes data length; Programmable bit rate up to 1 Mbit/s; Flexible message buffers (MBs), totalling up to 16 message buffers of 0–8 byte data length each, configurable as Rx or Tx, all supporting standard and extended messages; Unused MB space can be used as general purpose RAM space; Listen-only mode capability; Content-related addressing; No read/write semaphores; Three programmable mask registers: global for MBs 0–13, special for MB14, and special for MB15; Programmable transmit-first scheme: lowest ID or lowest buffer number; Time stamp based on 16-bit f