O9039A385IZWSRQ1

The TPS659038-Q1 and TPS659039-Q1 devices are PMICs for automotive applications. The device provides seven configurable buck converters with output currents up to 6A for memory, processor core, I/O, or LDO pre-regulation. One configurable buck converter can be combined with another 3A regulator to deliver up to 9A of output current. All buck converters can be synchronized to an external clock with frequencies between 1.7MHz and 2.7MHz, or to an internal fallback clock at 2.2MHz. The TPS659038-Q1 device contains 11 LDO regulators, while the TPS659039-Q1 device contains 6 LDO regulators for external use. These LDO regulators can be powered from the system supply or a pre-regulated supply. The power-up and power-down controller is configurable to support all power-up and power-down sequences (OTP-based). The TPS659038-Q1 and TPS659039-Q1 devices include a 32kHz RC oscillator for sequencing all resources during power-up and power-down. Where fast startup is required, a 16MHz crystal oscillator can also be used to rapidly generate a stable 32kHz frequency for the system. All LDOs and SMPS converters can be controlled via SPI or I2C interfaces or through power request signals. In addition, voltage adjustment registers allow the SMPS to be switched to different voltages as required by SPI, I2C, or top/bottom control. A dedicated pin in each package can be configured as part of the power-up sequence to control external resources. The device features GPIO functionality, with both GPIOs configurable as part of the power-up sequence to control external resources. Power request signals enable power optimization through the power mode control function. The device includes a general-purpose (GP) ∑-Δ ADC with three external input channels. The TPS659038-Q1 and TPS659039-Q1 devices are available in a 13-ball × 13-ball nFBGA package with 0.8mm pitch.

Applications

• Automotive sensor fusion
• Programmable logic controller

Key features

• Qualified for automotive applications with the following AEC-Q100 characteristics: Temperature Grade 3: −40°C to 85°C; ESD classification: HBM Class 2, CDM Class C3; Latch-up classification: I2C and SPI pins: Class IIB, all other pins: Class IIA
• Seven step-down SMPS regulators:
• One output: 0.7V–1.65V/6A (10mV steps), dual-phase configuration with DVS control
• One output: 0.7V–1.65V/4A (10mV steps), dual-phase configuration with DVS control
• One output: 0.7V–3.3V/3A (10mV or 20mV steps), single-phase configuration; can be combined with the 6A regulator to form a 9A three-phase regulator (via DVS control)
• Two outputs: 0.7V–3.3V/2A (10mV or 20mV steps), single-phase configuration; one DVS-capable regulator, also configurable as a 3A regulator
• Two outputs: 0.7V–3.3V/1A (10mV or 20mV steps), single-phase configuration; one DVS-capable regulator
• Output current measurement supported on all regulators except the 1A SMPS regulators
• Differential remote sensing (output and ground) on dual-phase and three-phase regulators
• ECO mode up to 5mA via hardware and software control, quiescent current 15µA
• Short-circuit protection
• Power-good indication (voltage and overcurrent)
• Internal soft-start for inrush current limiting
• SMPS phase synchronization to external clock or internal backup clock
• 11 general-purpose LDO regulators (50mV steps):
• Four LDOs: 0.9V–3.3V @ 300mA, supplied from pre-regulated rail
• Four LDOs: 0.9V–3.3V @ 200mA, supplied from pre-regulated rail
• One LDO: 0.9V–3.3V @ 50mA, supplied from pre-regulated rail
• One 100mA USB LDO
• One low-noise LDO: 0.9V–3.3V, up to 100mA output current (low-noise performance up to 50mA)
• Two additional LDOs for PMU internal use
• Short-circuit protection
• Clock management: 16MHz crystal oscillator and 32kHz RC oscillator, one buffered 32kHz output
• RTC with alarm wake-up function
• 12-bit Σ-Δ GPADC with three external input channels and six self-monitoring internal channels
• Thermal monitoring: high-temperature warning, thermal shutdown
• Control:
• Configurable power-up and power-down sequences (OTP)
• Configurable sequences between sleep and active states (OTP programmable)
• One dedicated digital output signal (REGEN) includable in the startup sequence
• Three digital output signals multiplexed with GPIOs, includable in the startup sequence
• Selectable control interfaces: one SPI for resource configuration and DVS control; two I2C interfaces — one dedicated to DVS control, one general-purpose I2C for resource configuration and DVS control
• Undervoltage lockout
• System voltage range: 3.135V to 5.25V
• Package option: 12mm × 12mm, 169-ball nFBGA, 0.8mm ball pitch