PIC16F13145T-I/REB

The PIC16F13145 microcontroller family features a specific peripheral set that provides an effective path to hardware-based solutions. This family introduces the Configurable Logic Block (CLB) peripheral, enabling users to integrate custom hardware-based logic into their applications. The CLB consists of 32 independent logic elements, each based on a Look-Up Table (LUT) design that offers extensive customization options, with operation independent of the CPU to improve response time and power consumption. The product family is available in 8-pin, 14-pin, and 20-pin packages, with up to 14KB of program Flash and up to 1KB of RAM. In addition to the CLB, the family features a 10-bit ADC with Computation (ADCC) at up to 100 ksps sample rate, an 8-bit DAC, two fast comparators (50 ns response time), and a range of other peripherals for timing control and serial communication with SMBus compatibility. The small form factor, combined with the CLB and other Core Independent Peripherals (CIPs), makes the PIC16F13145 family well-suited for a wide range of applications such as real-time control, digital sensor nodes, and markets including industrial and automotive.

Applications

• Real-time control
• Digital sensor nodes
• Industrial applications
• Automotive applications

Key features

• RISC architecture optimized for C compilers
• Operating speed: DC to 32 MHz clock input; minimum instruction time 125 ns
• 16-level deep hardware stack
• Low-current Power-on Reset (POR)
• Configurable Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Low-Power Brown-out Reset (LPBOR)
• Windowed Watchdog Timer (WWDT)
• Up to 14 KB program Flash
• Up to 1 KB data SRAM
• Memory Access Partition (MAP): program Flash divided into application block, boot block, and Storage Area Flash (SAF) block
• Programmable code protection and write protection
• Device Information Area (DIA): stores Fixed Voltage Reference (FVR) calibration data, temperature indicator calibration coefficients, and Microchip Unique Identifier (MUI)
• Device Configuration Information (DCI): stores program/erase row size and pin count details
• Direct, indirect, and relative addressing modes
• Operating voltage range: 1.8V to 5.5V
• Temperature range: Industrial: -40℃ to 85℃; Extended: -40℃ to 125℃
• Doze mode: CPU and peripherals operate at different cycle rates (typically CPU at lower rate)
• Idle mode: CPU halted, peripherals active
• Sleep mode: lowest power consumption; reduces system electrical noise during ADC conversions
• Low-power mode characteristics: Sleep mode: typical <900 nA (3V/25℃, WDT enabled); typical <600 nA (3V/25℃, WDT disabled)
• Operating current: typical 48 μA (32 kHz, 3V/25℃); typical <1 mA (4 MHz, 5V/25℃)
• One Configurable Logic Block (CLB)
• Two Capture/Compare/PWM (CCP) modules: 16-bit resolution in Capture/Compare mode; 10-bit resolution in PWM mode
• Two Pulse Width Modulators (PWM): 10-bit resolution
• Four Configurable Logic Cells (CLC): integrated combinational and sequential logic
• One configurable 8/16-bit timer (TMR0)
• One 16-bit timer with gate control (TMR1)
• One 8-bit timer with Hardware Limit Timer (HLT) (TMR2)
• Programmable CRC with memory scan: reliable monitoring of data/program memory for fail-safe operation (e.g., Class B); 32-bit CRC calculation over any portion of program Flash
• One Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART): supports RS-232, RS-485, LIN; auto-wake-up on Start bit
• One Master Synchronous Serial Port (MSSP): supports SPI mode, slave select synchronization, I²C mode, 7/10-bit addressing, SMBus
• Peripheral Pin Select (PPS): enables pin mapping for digital I/O
• Device I/O port features: up to 17 I/O pins; independently configurable I/O direction, open-drain, input threshold, slew rate, and weak pull-up; Interrupt-on-Change (IOC) supported on all pins; one external interrupt pin
• Analog-to-Digital Converter with Computation (ADCC), single-ended: up to 100 ksps sample rate; 10-bit resolution; up to 17 external input channels; five internal input channels; internal ADC oscillator (ADCRC); operates in Sleep mode; selectable auto-conversion trigger source
• One 8-bit Digital-to-Analog Converter (DAC): buffered output available on up to two I/O pins; internally connected to ADC and comparators
• Two Comparators (CMP): configurable power mode for faster response time (50 ns) or lower power operation; up to four external inputs; configurable output polarity; external output via PPS
• Two Fixed Voltage References (FVR): selectable output levels of 1.024V, 2.048V, and 4.096V; FVR1 internally connected to ADC; FVR2 internally connected to comparators and DAC
• High-accuracy internal oscillator module (HFINTOSC): selectable frequency up to 32 MHz; ±2% accuracy after calibration
• Internal 31 kHz oscillator (LFINTOSC)
• External high-frequency clock input: three crystal/resonator modes; two external clock (EC) power modes; 4xPLL available for external source
• Fail-safe clock monitor: enables operational recovery if external clock source fails
• Oscillator Start-up Timer