PIC24FJ128GA106-I/MR

Key features

• On-Chip 2.5V Voltage Regulator
• Switch between Clock Sources in Real Time
• Idle, Sleep and Doze modes with Fast Wake-up and Two-Speed Start-up
• Run mode: 1 mA/MIPS, 2.0V Typical
• Standby Current with 32 kHz Oscillator: 2.6 μA, 2.0V Typical
• Modified Harvard Architecture
• Up to 16 MIPS Operation at 32 MHz
• 8 MHz Internal Oscillator
• 17-Bit x 17-Bit Single-Cycle Hardware Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture with Flexible Addressing modes
• Linear Program Memory Addressing, Up to 12 Mbytes
• Linear Data Memory Addressing, Up to 64 Kbytes
• Two Address Generation Units (AGUs) for Separate Read and Write Addressing of Data Memory
• 10-Bit, Up to 16-Channel Analog-to-Digital (A/D) Converter at 500 ksps: Conversions available in Sleep mode
• Three Analog Comparators with Programmable Input/ Output Configuration
• Charge Time Measurement Unit (CTMU)
• Peripheral Pin Select: Allows independent I/O mapping of many peripherals at run time; Continuous hardware integrity checking and safety interlocks prevent unintentional configuration changes; Up to 46 available pins (100-pin devices)
• Three 3-Wire/4-Wire SPI modules (support 4 Frame modes) with 8-Level FIFO Buffer
• Three I²C modules support Multi-Master/Slave modes and 7-Bit/10-Bit Addressing
• Four UART modules: Supports RS-485, RS-232, LIN/J2602 protocols and IrDA; On-chip hardware encoder/decoder for IrDA; Auto-wake-up and Auto-Baud Detect (ABD); 4-level deep FIFO buffer
• Five 16-Bit Timers/Counters with Programmable Prescaler
• Nine 16-Bit Capture Inputs, each with a Dedicated Time Base
• Nine 16-Bit Compare/PWM Outputs, each with a Dedicated Time Base
• 8-Bit Parallel Master Port (PMP/PSP): Up to 16 address pins; Programmable polarity on control lines
• Hardware Real-Time Clock/Calendar (RTCC): Provides clock, calendar and alarm functions
• Programmable Cyclic Redundancy Check (CRC) Generator
• Up to Five External Interrupt Sources
• Operating Voltage Range of 2.0V to 3.6V
• Self-Reprogrammable under Software Control
• 5.5V Tolerant Input (digital pins only)
• Configurable Open-Drain Outputs on Digital I/Os
• High-Current Sink/Source (18 mA/18 mA) on all I/Os
• Selectable Power Management modes: Sleep, Idle and Doze modes with fast wake-up
• Fail-Safe Clock Monitor Operation: Detects clock failure and switches to on-chip FRC oscillator
• On-Chip LDO Regulator
• Power-on Reset (POR), Power-up Timer (PWRT), Low-Voltage Detect (LVD) and Oscillator Start-up Timer (OST)
• Flexible Watchdog Timer (WDT) with On-Chip Low-Power RC Oscillator for Reliable Operation
• In-Circuit Serial Programming (ICSP) and In-Circuit Debug (ICD) via Two Pins
• JTAG Boundary Scan Support
• Brown-out Reset (BOR)
• Flash Program Memory: 10,000 erase/write cycle endurance (minimum); 20-year data retention minimum; Selectable write protection boundary; Write protection option for Flash Configuration Words