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PIC24FJ64GA104-I/PT MICROCHIP
MICROCHIP

PIC24FJ64GA104-I/PT

PIC 16 Bit 32MHz TQFP-44(10x10) Microcontrollers RoHS

TQFP-44(10x10)ROHS3 CompliantActive

28/44-Pin, 16-Bit General Purpose Flash Microcontrollers with nano Watt XLP Technology

Manufacturer
MICROCHIP
Manufacturer part #
PIC24FJ64GA104-I/PT
Store part #
C185523
Package / case
TQFP-44(10x10)
Packaging
Tray
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

6 in stock

#C185523

Stock & price checked 3 days ago

QuantityUnit pricePack price
1+₹1,152.73₹1,152.73
10+₹994.78₹9,947.80
30+₹898.30₹26,949.00
100+₹817.67₹81,767.00

1 × ₹1,152.73

₹1,152.73

excl. GST

₹1,360.22 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 15-18 working days
  • GST invoice with every order
  • Standard pack: 160 per tray

PIC24FJ64GA104-I/PT

₹1,152.73 for 1 + GST

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Specifications

ADC (Bit)
10bit
Number of I/O
35
Operating Temperature
-40℃~+85℃
Voltage - Supply
2V~3.6V
Program Memory Type
FLASH
Program Storage Size
64KB
CPU Core
PIC
Core Size
16 Bit
CPU Maximum Speed
32MHz
Oscillator Type
Built-in

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
3A991A2
Packaging
Tray
Standard pack
160 / Tray
Sold per
Piece
Minimum order
1
Unit weight
0.3 g

Overview

28/44-Pin, 16-Bit General Purpose Flash Microcontrollers with nanoWatt XLP Technology

Key features

  • Selectable Power Management modes with nanoWatt XLP Technology for Extremely Low Power
  • Deep Sleep mode allows near total power-down (20 nA typical and 500 nA with RTCC or WDT), along with the ability to wake-up on external triggers, or self-wake on programmable WDT or RTCC alarm
  • Extreme low-power DSBOR for Deep Sleep, LPBOR for all other modes
  • Sleep mode shuts down peripherals and core for substantial power reduction, fast wake-up
  • Idle mode shuts down the CPU and peripherals for significant power reduction, down to 4.5 μA typical
  • Doze mode enables CPU clock to run slower than peripherals
  • Alternate Clock modes allow on-the-fly switching to a lower clock speed for selective power reduction during Run mode, down to 15 μA typical
  • Modified Harvard Architecture
  • Up to 16 MIPS Operation @32 MHz
  • 8 MHz Internal Oscillator with: - 4x PLL option - Multiple divide options
  • 17-Bit x 17-Bit Single-Cycle Hardware Fractional/integer Multiplier
  • 32-Bit by 16-Bit Hardware Divider
  • 16 x 16-Bit Working Register Array
  • C Compiler Optimized Instruction Set Architecture: - 76 base instructions - Flexible addressing modes
  • Linear Program Memory Addressing, up to 12 Mbytes
  • Linear Data Memory Addressing, up to 64 Kbytes
  • Two Address Generation Units for Separate Read and Write Addressing of Data Memory
  • Operating Voltage Range of 2.0V to 3.6V
  • Self-Reprogrammable under Software Control
  • 5.5V Tolerant Input (digital pins only)

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