PIC24HJ64GP510AT-I/PF

Key features

• Code-efficient (C and Assembly) architecture
• Single-cycle mixed-sign MUL plus hardware divide
• ±2% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer (WDT)
• Fast wake-up and start-up
• Low-power management modes (Sleep, Idle, Doze)
• Integrated Power-on Reset and Brown-out Reset
• 1.35 mA/MHz dynamic current (typical)
• 55 μA IPD current (typical)
• Two ADC modules: Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H; 18 analog inputs on 64-pin devices and up to 32 analog inputs on 100-pin devices
• Flexible and independent ADC trigger sources
• Up to nine 16-bit timers/counters. Can pair up to make four 32-bit timers. Eight Output Compare modules configurable as timers/counters. Eight Input Capture modules
• Two UART modules (10 Mbps) with support for LIN 2.0 protocols and IrDA
• Two 4-wire SPI modules (15 Mbps)
• Up to two I²C modules (up to 1 Mbaud) with SMBus support
• Up to two Enhanced CAN (ECAN) modules (1 Mbaud) with 2.0B support
• Data Converter Interface (DCI) module with I²S codec support
• Sink/Source up to 10 mA (pin specific) for standard VOH/VOL, up to 16 mA (pin specific) for nonstandard VOH1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• Up to 5 mA overvoltage clamp current
• External interrupts on all I/O pins
• AEC-Q100 REVG (Grade 1 -40°C to +125°C)
• AEC-Q100 REVG (Grade 0 -40°C to +150°C)
• Class B Safety Library, IEC 60730
• In-circuit and in-application programming
• Two program and two complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
• Trace and run-time watch