PIC32MM0064GPM064-I/PT

Key features

• 2.0V to 3.6V, -40℃ to +125℃, DC to 25 MHz
• Low-Power modes: Idle – CPU off, peripherals run from system clock; Sleep – CPU and peripherals off; Fast wake-up Sleep with retention; Low-power Sleep with retention
• 0.65 μA Sleep current for RAM Retention Regulator mode and 5 μA for Regulator Standby mode
• On-Chip 1.8V Voltage Regulator (VREG)
• On-Chip Ultra Low-Power Retention Regulator
• microAptiv UC 32-Bit Core with 5-Stage Pipeline
• microMIPS Instruction Set for 35% Smaller Code and 98% Performance compared to MIPS32 Instructions
• 1.53 DMIPS/MHz (37 DMIPS) (Dhrystone 2.1) Performance
• 3.17 CoreMark/MHz (79 CoreMark) Performance
• 16-Bit/32-Bit Wide Instructions with 32-Bit Wide Data Path
• Two Sets of 32 Core Register Files (32-bit) to Reduce Interrupt Latency
• Single-Cycle 32x16 Multiply and Two-Cycle 32x32 Multiply
• 64-Bit, Zero Wait State Flash with ECC to Maximize Endurance/Retention
• Up to 256K Flash Memory: 20,000 erase/write cycle endurance; 20 years minimum data retention; Self-programmable under software control
• Up to 32K SRAM Memory
• Multiple Interrupt Vectors with Individually Programmable Priority
• Fail-Safe Clock Monitor mode
• Configurable Watchdog Timer with On-Chip, Low-Power RC Oscillator
• Programmable Code Protection
• Selectable Oscillator Options Including: High-precision, 8 MHz Internal RC (FRC) Oscillator – 2x/3x/4x/6x/12x/24x PLL, which can be clocked from FRC or the Primary Oscillator; Primary high-speed, crystal/resonator oscillator or external clock
• USB 2.0 Compliant Full-Speed and Low-Speed Device, Host and On-The-Go (OTG) Controller: Dedicated DMA; Device mode operation from FRC oscillator; no crystal oscillator required
• Atomic Set, Clear and Invert Operation on Select Peripheral Registers
• High-Current Sink/Source
• Independent, Low-Power 32 kHz Timer Oscillator
• Three 4-Wire SPI modules: 16-byte FIFO; Variable width; I2S mode
• Three I2C Master and Slave w/Address Masking and IPMI Support
• Three Enhanced Addressable UARTs: RS-232, RS-485 and LIN/J2602 support; IrDA with on-chip hardware encoder and decoder
• External Edge and Level Change Interrupt on All Ports
• Hardware Real-Time Clock and Calendar (RTCC)
• Up to 24 Peripheral Pin Select (PPS) Remappable Pins
• 21 Total 16-Bit Timers: Three dedicated 16-bit timers/counters; Two can be concatenated to form a 32-bit timer; Two additional 16-bit timers in each MCCP and SCCP module, totaling 18
• Capture/Compare/PWM/Timer modules: Two 16-bit timers or one 32-bit timer in each module; PWM resolution down to 21 ns; Three Multiple Output (MCCP) modules: Flexible configuration as PWM, input capture, output compare or timers; Six PWM outputs; Programmable dead time; Auto-shutdown; Six Single Output (SCCP) modules: Flexible configuration as PWM, input capture, output compare or timers; Single PWM output
• Reference Clock Output (REFO)
• Four Configurable Logic Cells (CLCs) with Internal Connections to Select Peripherals and PPS
• Four-Channel Hardware DMA with Automatic Data Size Detection and CRC Engine
• Two Programming and Debugging Interfaces: Two-wire ICSP interface with non-intrusive access and real-time data exchange with application; Four-wire MIPS standard Enhanced JTAG interface
• IEEE Standard 1149.2 Compatible (JTAG) Boundary Scan
• Three Analog Comparators with Input Multiplexing
• Programmable High/Low-Voltage Detect (HLVD)
• 5-Bit Comparator Voltage Reference DAC with Pin Output
• Up to 24-Channel, Software-Selectable 10/12-Bit SAR Analog-to-Digital Converter (ADC): 12-bit 200K samples/second conversion rate (single Sample-and-Hold); 10-bit 300k samples/second conversion rate (single Sample-and-Hold); Sleep mode operation; Low-voltage boost for input; Band gap reference input feature; Windowed threshold compare feature; Auto-scan feature
• Brown-out Reset (BOR)