R5F107ACMSP#V0

True Low Power Platform, High Resolution PWM and Rich Analog, 2.7 V to 5.5 V operation, 32 to 64 Kbyte Flash, for Inverter Control, Digital Power Control and Lighting Control Applications

Applications

• Inverter Control
• Digital Power Control
• Lighting Control Applications

Key features

• Ultra-Low Power Technology
• 2.7 V to 5.5 V operation from a single supply
• Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA
• Halt (RTC + LVD): 0.60 µA
• Operating: 156.25 µA/MHz
• 16-bit RL78 CPU Core
• Delivers 41 DMIPS at maximum operating frequency of 32 MHz
• Instruction execution: 86% of instructions can be executed in 1 to 2 clock cycles
• CISC architecture (Harvard) with 3-stage pipeline
• Multiply signed & unsigned: 16×16 to 32-bit result in 1 clock cycle
• MAC: 16×16 to 32-bit result in 2 clock cycles
• 16-bit barrel shifter for shift & rotate in 1 clock cycle
• 1-wire on-chip debug function
• Main Flash Memory
• Density: 32 KB to 64 KB
• Block size: 1 KB
• On-chip single voltage flash memory with protection from block erase/writing
• Self-programming with secure boot swap function and flash shield window function
• Data Flash Memory
• Data flash with background operation
• Data flash size: 4 KB
• Erase cycles: 1 million (typ.)
• Erase/programming voltage: 2.7 V to 5.5 V
• 2 KB to 4 KB size options
• Supports operands or instructions
• Back-up retention in all modes
• High-speed On-chip Oscillator
• 32 MHz with +/-1% accuracy over voltage (2.7 V to 5.5 V) and temperature (-20℃ to 85℃)
• Pre-configured settings: 32 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz & 1 MHz
• Reset and Supply Management
• Power-on reset (POR) monitor/generator
• Low voltage detection (LVD) with 6 setting options (Interrupt and/or reset function)
• Data Memory Access (DMA) Controller
• Up to 2 fully programmable channels
• Transfer unit: 8- or 16-bit
• 16-bit timers KB0 to KB2, and KC0 for PWM output
• 16-bit timers KB0 to KB2: maximum 6 outputs (3 channels × 2)
• Smooth start function, dithering function, forced output stop function (unsynchronized with comparator or external interrupt) enables over-voltage protection, over-current protection and peak current control, and single/interleave PFC function
• Average resolution <0.98 nsec output, 64 MHz (when using PLL) + dithering option
• 16-bit timer KC0 (1 channel × 6 (output))
• PWM output gating function by interlocking with 16-bit timers KB0, KB1, and KB2
• Extended-Function Timers
• Multi-function 16-bit timers: Up to 8 channels
• Real-time clock (RTC): 1 channel (full calendar and alarm function with watch correction function)
• Interval timer: 12-bit, 1 channel
• 15 kHz watchdog timer: 1 channel (window function)
• Multiple Communication Interfaces
• Up to 1 channel × I²C multi-master (SMBus/PMBus support)
• Up to 1 channel × CSI/SPI (7-, 8-bit)
• Up to 3 channels × UART (7-, 8-, 9-bit), DALI support 1 channel (8-, 16-, 17-, 24-bit, master and slave)
• Up to 1 channel × LIN
• Rich Analog
• ADC: Up to 11 channels, 8/10-bit resolution, 2.125 µs conversion time
• Supports 2.7 V
• Internal voltage reference (1.45 V)
• Comparator: High response time 70 ns (typ.), up to 6 channels, internal DAC 3 channels 8-bit resolution, window comparator mode
• PGA (x4 to x32): 6 input channels
• On-chip temperature sensor
• Safety Features (IEC or UL 60730 compliance)
• Flash memory CRC calculation
• RAM parity error check
• RAM/SFR write protection
• Illegal memory access detection
• Clock stop/frequency detection
• ADC self-test
• General Purpose I/O
• 5-V tolerant, high-current (up to 8.5 mA per pin)
• Open-drain, internal pull-up support
• Operating Ambient Temperature
• Standard: -40℃ to +105℃
• Extend: -40℃ to +125℃
• Package Type and Pin Count
• SSOP: 20, 30, 38