R5F11NGGAFB#10

Analog front-end (24-bit ΔΣA/D converter with programmable gain instrumentation amplifier, Amplifier unit and 12-bit D/A converter), External signal sampler/Sampling output timer detector and Integrated LCD controller/driver. True Low Power Platform (as low as 70.8 μA/MHz, and 0.68 μA in Halt mode(RTC2+LVD)), 1.8 to 5.5V operation, 64 to 128 Kbyte Flash, 33 DMIPS at 24 MHz, for Healthcare and Flow meter applications.

Applications

• Healthcare
• Flow meter

Key features

• Ultra-low power consumption technology
• VDD = 2.4 to 5.5 V (10-bit SAR A/D converter: 2.4 to 5.5 V, operating voltage of the analog front-end (AFE): 2.7 to 5.5 V), VDD = 1.8 to 5.5 V
• HALT mode
• STOP mode
• SNOOZE mode
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed from high speed (0.04167 µs: @ 24 MHz operation with high-speed on-chip oscillator clock) to ultra-low speed (30.5 µs: @32.768 kHz operation with subsystem clock)
• Multiply/divide and multiply/accumulate instructions are supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register × 8) × 4 banks
• On-chip RAM: 5.5 KB, 8 KB
• Code flash memory: 64 to 128 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security function)
• On-chip debug function
• Self-programming (with boot swap function/flash shield window function)
• Data flash memory: 4 KB
• Background operation (BGO): Instructions can be executed from the program memory while rewriting the data flash memory.
• Number of rewrites: 1,000,000 times (TYP.)
• Voltage of rewrites: VDD = 2.4 to 5.5 V, 1.8 to 5.5 V
• Select from 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz
• High accuracy: ±1.0% (VDD = 2.4 to 5.5 V, TA = -20 to +85℃, VDD = 1.8 to 5.5 V, TA = -20 to +85℃)
• Operating ambient temperature: TA = -40 to +85℃ (A: Consumer applications, D: Industrial applications)
• On-chip power-on-reset (POR) circuit
• On-chip voltage detector (LVD) (Select interrupt and reset from 9 or 12 levels)
• Transfer modes: Normal transfer mode, repeat transfer mode, block transfer mode
• Activation sources: Activated by interrupt sources (35 sources).
• Chain transfer function
• Event signals of 18 to 26 types can be linked to the specified peripheral function.
• Simplified SPI(CSI)/Simplified SPI(CSI)(SPI supported): 3 channels
• UART/UART (LIN-bus supported): 3 channels
• I2C/simplified I2C: 4 channels
• Serial interface UARTMG (9600 bps @ 38.4 kHz): 1 channel (R5F11R only)
• 16-bit timer: Timer array unit (TAU): 8 channels, Timer RJ: 2 channels (R5F11R only)
• 8-bit timer: 2 channels, 6 channels
• 12-bit interval timer: 1 channel
• Real-time clock 2: 1 channel (calendar for 99 years, alarm function, and clock correction function)
• Watchdog timer: 1 channel (operable with the dedicated low-speed on-chip oscillator)
• External signal sampler: 1 channel (R5F11R only)
• Sampling output timer detector (SMOTD): 6 channels for input, 3 channels for output (R5F11R only)
• Internal voltage boosting method, capacitor split method, and external resistance division method are switchable.
• Segment signal output: 27 (23) to 36 (32)
• Common signal output: 4 (8)
• AFE reference power supply (ABGR)
• LDO for supplying power to internal circuits (REGA)
• LDO for supplying power to a sensor (SBIAS): 0.5 to 2.2 V
• 24-bit second-order ΔΣ A/D converter (AVDD = 2.7 to 5.5 V)
• SNDR: 85 dB (TYP.)
• Output data rate: 488 sps to 15.625 ksps in normal mode 61 sps to 1.953 ksps in low power mode
• Programmable gain instrumentation amplifier (PGA0)
• Analog input: 1 to 5 channels (differential input mode or single-ended input mode)
• D/A converter for offset adjustment
• Variable gain: x1 to x64
• Programmable gain instrumentation amplifier (PGA1): 1 channel (R5F11NL, R5F11PL, and R5F11NG only)
• Analog input: 1 or 2 channels
• Variable gain: x12, x16, x20, x24
• Rail-to-rail operational amplifier (AMP0): 1 channel
• General-purpose operational amplifier (AMP1, AMP2): 2 channels (R5F11NL, R5F11PL, and R5F11NG only)
• 8-bit resolution R-2R resistor ladder D/A converter (DAC0) (AVDD = 2.7 to 5.5 V): 1 channel
• 12-bit resolution R-2R resistor ladder D/A converter (DAC1) (AVDD = 2.7 to 5.5 V): 1 channel (R5F11NL, R5F11PL, and R5F11NG only)
• 10-bit resolution A/D converter (VDD = 2.4 to 5.5 V, VDD = 1.8 to 5.5 V)
• Analog input: 3 channels
• Internal reference voltage (TYP. 1.45 V) and temperature sensor
• I/O ports: 29 to 63 (N-ch open drain I/O [withstand voltage of 6 V]: 2)
• Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor
• On-chip clock output/buzzer output controller
• On-chip BCD (binary-coded decimal) correction circuit