R5F1216CASP#30

Key features

• True low-power platform — operating current 61μA/MHz, operational up to TA = 125℃, pin count 10 to 32, code flash 16 to 32 KB, RAM 2 KB, capacitive touch sensing unit, operating voltage 2.4 to 5.5 V
• Low-power technology: single supply VDD = 2.4 to 5.5 V, HALT mode and STOP mode support
• RL78 CPU core: CISC architecture with 3-stage pipeline, minimum instruction execution time ranging from high-speed (0.0625 μs: @ 16 MHz high-speed on-chip oscillator) to ultra-low-speed (30.5 μs: @ 32.768 kHz subsystem clock), 1 MB address space, general-purpose registers (8-bit × 8) × 4 banks, 2 KB on-chip RAM
• Code flash: 16 to 32 KB capacity, 1 KB block size, erase-before-write only, on-chip debug support, self-programming support (no boot swap / flash protection window function)
• Data flash: 1 KB capacity, 512 B block size, 32-bit rewrite unit, no background operation (cannot execute instructions from code flash during data flash rewrite), typical endurance 1,000,000 cycles, rewrite voltage VDD = 2.4 to 5.5 V
• High-speed on-chip oscillator: selectable frequencies 16 MHz, 8 MHz, 4 MHz, 2 MHz, and 1 MHz; frequency accuracy ±1.0% (VDD = 2.4 to 5.5 V, TA = -20 to +85℃); ±1.5% (VDD = 2.4 to 5.5 V, TA = -40 to -20℃); ±1.5% (VDD = 2.4 to 5.5 V, TA = +85 to +105℃); ±1.5% (VDD = 2.4 to 5.5 V, TA = +85 to +125℃); ±2.0% (VDD = 2.4 to 5.5 V, TA = -40 to +85℃)
• Operating ambient temperature: TA = -40 to +85℃ (consumer applications), TA = -40 to +105℃ (industrial applications), TA = -40 to +125℃ (industrial applications)
• Power management and reset: on-chip selectable power-on reset circuit (selectable from 3 reset levels, configurable stop)
• Serial interfaces: simplified SPI (CSI): 1 to 3 channels; UART: 1 to 3 channels; simplified I²C: 1 to 3 channels; I²C: 1 channel
• Timers: 16-bit timer: 8 channels; 12-bit interval timer: 1 channel; watchdog timer: 1 channel (operable with dedicated low-speed on-chip oscillator); real-time clock 2: 1 channel (99-year calendar, alarm, and clock correction functions)
• A/D converter: 8/10-bit resolution ADC (VDD = 2.4 to 5.5 V), analog inputs: 4 to 11 channels, selectable internal reference voltage (0.815 V typ.), temperature sensor, and touch TSCAP voltage
• Comparator: 1 to 2 channels; operating modes: high-speed mode, low-speed mode; selectable external or internal reference voltage
• Capacitive touch sensing unit: 15 channels; self-capacitance: single pin per key, up to 15 keys; mutual-capacitance: matrix key configuration by selecting transmit/receive pins from 15 pins, up to 16 keys
• I/O ports: I/O ports: 8 to 30 (N-channel open-drain I/O (6 V withstand voltage): 0 to 2), configurable N-channel open-drain and on-chip pull-up resistors; external interrupt: 10 channels; on-chip clock output / buzzer output controller
• Other: on-chip BCD correction circuit