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R5F52106BDFM#10 RENESAS
RENESAS

R5F52106BDFM#10

RX 32 Bit 50MHz LFQFP-64(10x10) Microcontrollers RoHS

LFQFP-64(10x10)ROHS3 CompliantActive

50-MHz 32-bit RX MCUs, 78 DMIPS, up to 1-MB flash memory, 12-bit A/D, 10-bit D/A, ELC, MPC, RTC, up to 15 comms channels

Manufacturer
RENESAS
Manufacturer part #
R5F52106BDFM#10
Store part #
C3230422
Package / case
LFQFP-64(10x10)
Packaging
Tray
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

10 in stock

#C3230422

Stock & price checked 19 h ago

QuantityUnit pricePack price
1+₹885.05₹885.05
10+₹863.80₹8,638.00
30+₹849.70₹25,491.00
100+₹835.61₹83,561.00

1 × ₹885.05

₹885.05

excl. GST

₹1,044.36 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 15-18 working days
  • GST invoice with every order
  • Standard pack: 1,280 per tray

R5F52106BDFM#10

₹885.05 for 1 + GST

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Specifications

DAC (Bit)
10bit
ADC (Bit)
12bit
Number of I/O
48
Operating Temperature
-40℃~+85℃
Program Memory Type
FLASH
Voltage - Supply
1.62V~5.5V
EEPROM
8KB
Program Storage Size
256KB
CPU Core
RX
Core Size
32 Bit
CPU Maximum Speed
50MHz
Oscillator Type
Built-in

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
3A991A2
Packaging
Tray
Standard pack
1,280 / Tray
Sold per
Piece
Minimum order
1
Unit weight
6.76 g

Overview

Applications

  • 69WLBGA (SWBG0069LA-A): General consumer equipment
  • Other than above package: General industrial and consumer equipment

Key features

  • 32-bit RX CPU core
  • Max. operating frequency: 50 MHz
  • Capable of 78 DMIPS in operation at 50 MHz
  • Accumulator handles 64-bit results (for a single instruction) from 32x32-bit operations
  • Multiplication and division unit handles 32x32-bit operations (multiplication instructions take one CPU clock cycle)
  • Fast interrupt
  • CISC Harvard architecture with 5-stage pipeline
  • Variable-length instructions, ultra-compact code
  • On-chip debugging circuit
  • Low power design and architecture
  • Operation from a single 1.62-V to 5.5-V supply
  • 1.62-V operation available (at up to 20 MHz)
  • Deep software standby mode with RTC remaining usable
  • Four low power consumption modes
  • On-chip flash memory for code, no wait states
  • 50-MHz operation, 20-ns read cycle
  • No wait states for reading at full CPU speed
  • 64-K to 1-Mbyte capacities
  • User code programmable via the SCI
  • Programmable at 1.62 V
  • For instructions and operands
  • On-chip data flash memory
  • 8 Kbytes (Number of times of reprogramming: 100,000)
  • Erasing and programming impose no load on the CPU
  • On-chip SRAM, no wait states
  • 12-K to 96-Kbyte size capacities
  • DMA
  • DMAC: Incorporates four channels
  • DTC: Four transfer modes
  • ELC
  • Module operation can be initiated by event signals without going through interrupts
  • Modules can operate while the CPU is sleeping
  • Reset and supply management
  • Nine types of reset, including the power-on reset (POR)
  • Low voltage detection (LVD) with voltage settings
  • Clock functions
  • Frequency of external clock: Up to 20 MHz
  • Frequency of the oscillator for sub-clock generation: 32.768 kHz
  • PLL circuit input: 4 MHz to 12.5 MHz
  • On-chip low- and high-speed oscillators, dedicated on-chip low-speed oscillator for the IWDT
  • Generation of a dedicated 32.768-kHz clock for the RTC
  • Clock frequency accuracy measurement circuit (CAC)
  • Realtime clock
  • Adjustment functions (30 seconds, leap year, and error)
  • Year and month display or 32-bit second display (binary counter) is selectable
  • Time capture function
  • Time capture on event-signal input through external pins
  • RTC capable of initiating return from deep software standby mode
  • Independent watchdog timer
  • 125-kHz on-chip oscillator produces a dedicated clock signal to drive IWDT operation
  • Useful functions for IEC60730 compliance
  • Self-diagnostic and disconnection-detection assistance functions for the A/D converter, clock frequency accuracy measurement circuit, independent watchdog timer, functions to assist in RAM testing, etc.
  • Up to 15 communications channels
  • SCI with many useful functions (up to 13 channels)
  • Asynchronous mode, clock synchronous mode, smart card interface
  • I²C bus interface: Transfer at up to 400 kbps, capable of SMBus operation (one channel)
  • RSPI (one channel): Transfer at up to 16 Mbps (768-Kbyte/1-Mbyte flash memory or 144/145-pin products)
  • External address space
  • Four CS areas (Ω⁴x16 Mbytes)
  • 8- or 16-bit bus space is selectable per area
  • Up to 20 extended-function timers
  • 16-bit MTU: input capture, output compare, complementary PWM output, phase counting mode (six channels)
  • 16-bit TPU: input capture, output capture, phase counting mode (six channels)
  • 8-bit TMR (four channels)
  • 16-bit compare-match timers (four channels)
  • 12-bit A/D converter
  • Capable of conversion within 1 μs
  • Sample-and-hold circuits (for three channels)
  • Three-channel synchronized sampling available
  • Self-diagnostic function and analog input disconnection detection assistance function
  • 10-bit D/A converter
  • Analog comparator
  • General I/O ports
  • MPC
  • Multiple locations are selectable for I/O pins of peripheral functions

Alternatives

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