R7FA6T2AD3CNB#AA0

This MCU integrates multiple Arm-based 32-bit core software-compatible families that share a set of Renesas common peripherals to facilitate design scalability and efficient platform-based product development. MCUs in this family feature a high-performance Arm Cortex-M33 core with a maximum operating frequency of 240 MHz, offering the following characteristics: up to 512 KB code flash, 64 KB SRAM, General-Purpose PWM Timer (GPT) — enhanced high resolution, analog peripherals, and safety and security features.

Key features

• Armv8-M architecture with Main Extension, max operating frequency: 240 MHz
• Arm Memory Protection Unit (Arm MPU)
• Protected Memory System Architecture (PMSAv8)
• Secure MPU (MPU_S): 8 regions
• Non-secure MPU (MPU_NS): 8 regions
• SysTick timer
• Dual embedded SysTick timers: secure and non-secure instances
• Driven by LOCO or system clock
• CoreSight ETM-M33
• Up to 512 KB code flash
• 16 KB data flash (125,000 program/erase (P/E) cycles)
• 64 KB SRAM
• 6 Serial Communications Interface (SCI)
• Asynchronous interface
• 8-bit clock synchronous interface
• Smart card interface
• Simple IIC
• Simple SPI
• Simple LIN
• Manchester encoding
• 2 I²C bus interfaces (IIC)
• Up to 3.2 Mbps transfer rate (high-speed mode)
• 2 Serial Peripheral Interfaces (SPI)
• CAN with Flexible Data Rate (CANFD)
• 2 A/D converters (ADC)
• Up to 16-bit resolution
• Up to 6.25 Msps
• 6-channel dedicated sample-and-hold circuits
• 4 Programmable Gain Amplifiers (PGA)
• 4 high-speed analog comparators (ACMPHS)
• 4 12-bit D/A converters (DAC12)
• Temperature sensor (TSN)
• 4 high-resolution 32-bit general-purpose PWM timers (GPT32)
• 156 ps resolution at 200 MHz
• 6 32-bit general-purpose PWM timers (GPT32)
• 2 low-power asynchronous general-purpose timers (AGT)
• Secure Cryptographic Engine (SCE5)
• Symmetric algorithm: AES
• Hash generation: GHASH
• 128-bit unique ID
• Arm TrustZone
• Up to three regions in code flash
• Up to two regions in data flash
• Up to three regions in SRAM
• Independent secure or non-secure attributes per peripheral
• Device lifecycle management
• Low-power modes
• Event Link Controller (ELC)
• Data Transfer Controller (DTC)
• 8 DMA controllers (DMAC)
• Power-on reset
• Low Voltage Detection (LVD) with voltage setting
• Watchdog Timer (WDT)
• Independent Watchdog Timer (IWDT)
• Key Interrupt Function (KINT)
• Trigonometric Function Unit (TFU)
• IIR Filter Accelerator (IIRFA)
• Main clock oscillator (MOSC) (8 to 24 MHz)
• High-speed on-chip oscillator (HOCO) (16/18/20 MHz)
• Medium-speed on-chip oscillator (MOCO) (8 MHz)
• Low-speed on-chip oscillator (LOCO) (32.768 kHz)
• IWDT-dedicated on-chip oscillator (15 kHz)
• HOCO/MOCO/LOCO clock trimming
• PLL/PLL2
• Clock output support
• 5 V tolerant, open-drain, input pull-up, switchable drive capability
• VCC: 2.7 to 3.6 V
• Operating temperature Ta = -40°C to +105°C
• 100-pin LQFP (14 mm × 14 mm, 0.5 mm pitch)
• 64-pin LQFP (10 mm × 10 mm, 0.5 mm pitch)
• 48-pin LQFP (7 mm × 7 mm, 0.5 mm pitch)
• 64-pin QFN (8 mm × 8 mm, 0.4 mm pitch)
• 48-pin QFN (7 mm × 7 mm, 0.5 mm pitch)