R7FS3A6783A01CFL#AA0

The MCU integrates multiple series of software- and pin-compatible Arm -based 32-bit cores that share a common set of Renesas peripherals to facilitate design scalability and efficient platform-based product development. The MCU provides an optimal combination of low-power, high-performance Arm Cortex -M4 core running up to 48 MHz with the following features: 256-KB code flash memory 32-KB SRAM Segment LCD Controller (SLCDC) Capacitive Touch Sensing Unit (CTSU) USB 2.0 Full-Speed Module (USBFS) 14-bit A/D Converter (ADC14) 12-bit D/A Converter (DAC12) Security features.

Key features

• Armv7E-M architecture with DSP instruction set
• Maximum operating frequency: 48 MHz
• Support for 4-GB address space
• Arm Memory Protection Unit (Arm MPU) with 8 regions
• Debug and Trace: ITM, DWT, FPB, TPIU, ETB
• CoreSight Debug Port: JTAG-DP and SW-DP
• 256-KB code flash memory
• 8-KB data flash memory (100,000 program/erase (P/E) cycles)
• 32-KB SRAM
• Flash Cache (FCACHE)
• Memory Protection Unit (MPU)
• 128-bit unique ID
• USB 2.0 Full-Speed Module (USBFS) - On-chip transceiver with voltage regulator - Compliant with USB Battery Charging Specification 1.2
• Serial Communications Interface (SCI)×4 - UART - Simple IIC - Simple SPI
• Serial Peripheral Interface (SPI)×2
• I2C bus interface (IIC)×2
• Controller Area Network (CAN) module
• Serial Sound Interface Enhanced (SSIE)
• 14-bit A/D Converter (ADC14)
• 12-bit D/A Converter (DAC12)
• 8-bit D/A Converter (DAC8)×2 (for ACMPLP)
• Low-Power Analog Comparator (ACMPLP)×2
• Operational Amplifier (OPAMP) × 4
• Temperature Sensor (TSN)
• General PWM Timer 32-Bit (GPT32)×2
• General PWM Timer 16-Bit (GPT16)×6
• Asynchronous General-Purpose Timer (AGT)×2
• Watchdog Timer (WDT)
• Error Correction Code (ECC) in SRAM
• SRAM parity error check
• Flash area protection
• ADC self-diagnosis function
• Clock Frequency Accuracy Measurement Circuit (CAC)
• Cyclic Redundancy Check (CRC) calculator
• Data Operation Circuit (DOC)
• Port Output Enable for GPT (POEG)
• Independent Watchdog Timer (IWDT)
• GPIO readback level detection
• Register write protection
• Main oscillator stop detection
• Illegal memory access
• Low power modes
• Realtime Clock (RTC) with calendar and Battery Backup support
• Event Link Controller (ELC)
• DMA Controller (DMAC)×4
• Data Transfer Controller (DTC)
• Key Interrupt Function (KINT)
• Power-on reset
• Low Voltage Detection (LVD) with voltage settings
• AES128/256
• GHASH
• True Random Number Generator (TRNG)
• Segment LCD Controller (SLCDC) - Up to 38 segments × 4 commons - Up to 34 segments × 8 commons
• Capacitive Touch Sensing Unit (CTSU)
• Main clock oscillator (MOSC) (1 to 20 MHz when VCC = 2.4 to 5.5 V) (1 to 8 MHz when VCC = 1.8 to 2.4 V) (1 to 4 MHz when VCC = 1.6 to 1.8 V)
• Sub-clock oscillator (SOSC) (32.768 kHz)
• High-speed on-chip oscillator (HOCO) (24, 32, 48, 64 MHz when VCC = 2.4 to 5.5 V) (24, 32, 48 MHz when VCC = 1.8 to 5.5 V) (24, 32 MHz when VCC = 1.6 to 5.5 V)
• Middle-speed on-chip oscillator (MOCO) (8 MHz)
• Low-speed on-chip oscillator (LOCO) (32.768 kHz)
• IWDT-dedicated on-chip oscillator (15 kHz)
• Clock trim function for HOCO/MOCO/LOCO
• Clock out support
• Up to 84 input/output pins - Up to 3 CMOS input - Up to 81 CMOS input/output - Up to 9 input/output 5-V tolerant - Up to 2 high current (20 mA)
• VCC: 1.6 to 5.5 V
• Ta = -40℃ to +85℃ - 100-pin LGA (7 mm×7 mm, 0.65 mm pitch)
• Ta = -40℃ to +105℃ - 100-pin LQFP (14 mm×14 mm, 0.5 mm pitch) - 64-pin LQFP (10 mm×10 mm, 0.5 mm pitch) - 64-pin QFN (8 mm×8 mm, 0.4 mm pitch) - 48-pin LQFP (7 mm×7 mm, 0.5 mm pitch) - 48-pin QFN (7 mm×7 mm, 0.5 mm pitch) - 40-pin QFN (6 mm×6 mm, 0.5 mm pitch)