S4MF03107SPZQQ1

The TMS470MF04207/03107 devices belong to the TMS470M automotive-grade 16/32-bit Reduced Instruction Set Computer (RISC) microcontroller family. The TMS470M microcontrollers leverage the high-efficiency Cortex–M3 16/32-bit RISC Central Processing Unit (CPU) to deliver high performance, thereby achieving high instruction throughput and maintaining excellent code efficiency. The TMS470M devices use the big-endian byte order format, in which the most significant byte of a word is stored in the lowest-numbered byte, while the least significant byte is stored in the highest-numbered byte. High-end embedded control applications require their controllers to provide more performance while keeping costs low. The TMS470M microcontroller architecture provides a solution for these performance and cost requirements while maintaining low power consumption. The composition of the TMS470MF04207/03107 devices is as follows: - 16/32-bit RISC CPU core - Up to 448K bytes of program flash memory (with SECDED ECC) for TMS470MF04207 - Up to 320K bytes of program flash memory (with SECDED ECC) for TMS470MF03107 - 64K bytes of flash memory (with SECDED ECC) for additional program space or EEPROM emulation - Up to 24K bytes of Static RAM (SRAM) (with SECDED ECC) - Real-Time Interrupt Timer (RTI) - Vector Interrupt Module (VIM) - Hardware Built-In Self-Test (BIST) checker for SRAM (MBIST) and CPU (LBIST) - 64-bit Cyclic Redundancy Checker (CRC) - Clock module based on Frequency-Modulated Zero-Pin Phase-Locked Loop (FMzPLL) (with pre-scaler) - Two Multi-Buffered Serial Peripheral Interfaces (MibSPI) - Two UARTs (SCI) with Local Interconnect Network Interface (LIN) - Two CAN controllers (DCAN) - High-End Timer (HET) - External Clock Pre-Scaler (ECP) module - One 16-channel 10-bit Multi-Buffered ADC (MibADC) - Error Signaling Module (ESM) - 4 dedicated General-Purpose I/O (GIO) pins and 45 additional peripheral I/O (100-pin package) The TMS470M memory includes general-purpose SRAM, which supports single-cycle read/write access in byte, half-word, and word modes. The SRAM on the TMS470M devices can be protected using ECC. This feature uses a single-error correction and double-error detection circuit (SECDED circuit) to detect and selectively correct single-bit errors and detect all double-bit errors and some multi-bit errors. This is achieved by storing an 8-bit ECC checksum/code for each 64-bit double-word of the memory space in a separate ECC RAM memory space. The flash memory on the device is a non-volatile, electrically erasable, and programmable memory. It is implemented using a 144-bit wide data word (128 bits without ECC) and a 64-bit wide flash module interface. The flash memory operates at a system clock frequency of up to 28MHz. The pipeline mode with flash data linear prefetching enables a system clock of up to 80MHz. The Enhanced Real-Time Interrupt (RTI) module on the TMS470M devices can be optionally driven by the oscillator clock. The Digital Watchdog (DWD) is a 25-bit resettable down-counter that provides a system reset when the watchdog counter expires. The TMS470M devices have six communication interfaces: two LIN/SCI, two DCAN, and two MibSPI. LIN is the Local Interconnect Network standard and also supports an SCI mode. SCI can be used in a full-duplex, serial I/O interface for asynchronous communication between the CPU and other peripherals using the standard Non-Return-to-Zero (NRZ) format. DCAN uses a serial, multi-master communication protocol that efficiently supports distributed real-time control and robust communication rates of up to 1 Megabit per second (Mbps). DCAN is well-suited for applications operating in noisy and harsh environments (e.g., automotive and industrial fields) that require reliable serial communication or multiplexed lines. MibSPI provides a convenient serial interaction method for high-speed communication between similar shift register-type devices. MibSPI provides standard SOMI, SIMO, and SPI clock interfaces as well as up to 8 chip select lines. HET is an advanced intelligent timer that provides precise timing functions for real-time applications. The timer is software-controlled, uses a reduced instruction set, and has a dedicated micro-timer and a connected I/O port. This HET can be used for comparison, capture, or general-purpose I/O. It is particularly suitable for applications that require multiple sensor information and actuator driving with complex and accurate time pulses. The TMS470M HET peripheral includes an "Exclusive OR (XOR) sharing" function. This function allows the "XOR" operation of two adjacent HET high-resolution channels, enabling the output of a pulse smaller than the standard HET. The TMS470M devices have a 10-bit resolution sample-and-hold MibADC. Each MibADC channel can be grouped using software for sequential conversion sequences. There are three separate groups, all of which can be triggered by an external event. Each sequence can perform a single conversion when triggered or be configured to operate in continuous conversion mode. The Frequency-Modulated Zero-Pin Phase-Locked Loop (FMzPLL) clock module includes a phase-locked loop, a clock monitor circuit, a clock enable circuit, and a pre-scaler. The function of the FMzPLL is to multiply the external frequency reference to a higher frequency for internal use. The FMzPLL provides the input to the Global Clock Module (GCM). The GCM module then provides the system clock (HCLK), real-time interrupt clock (RTICLK), CPU clock (GCLK), HET clock (VCLK2), DCAN clock (AVCLK1), and peripheral interface clock (VCLK) to all other TMS470M device modules. In addition, the TMS470MF04207/TMS470MF03107 devices also have two External Clock Pre-Scaler (ECP) modules, which output a continuous external clock (ECLK) when enabled. The ECLK1 frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. The second ECLK output can be selected to replace the HET15 output. It shares the same source clock as ECLK1 but can be independently configured for a separate output frequency derived from ECLK1. The Error Signaling Module (ESM) provides a common location for error reporting within the device, enabling efficient error checking and identification.

Key features

• High-performance automotive-grade MCU with safety features
• Full automotive temperature range
• ECC on Flash and SRAM
• CPU and memory BIST
• ARM Cortex-M3 32-bit RISC CPU
• Efficient 1.2 DMIPS/MHz
• Optimized Thumb2 instruction set
• MPU with open architecture and third-party support
• Integrated debug module
• Operating characteristics
• Up to 80 MHz system clock
• Single 3.3V supply
• Integrated memory
• 448 KB total program Flash with ECC
• Flash EEPROM emulation support
• 24 KB SRAM with ECC
• Key peripherals
• Advanced timer, MibADC, CAN, MibSPI
• Common TMS470M/570 platform architecture
• Consistent memory map across device family
• RTI
• Digital safety watchdog
• VIM
• CRC
• FMzPLL-based clock module
• Oscillator and PLL clock module
• Up to 49 peripheral I/O pins
• 4 dedicated GIO pins with external interrupts
• Two ECP modules
• Programmable low-frequency ECLK output
• One dedicated pin and one multiplexed ECLK/HET pin
• Communication interfaces
• Two CAN controllers
• One with 32 mailboxes, one with 16 mailboxes
• Parity on mailbox RAM
• Two MibSPI
• 12 total chip selects
• 64 buffers with parity on each buffer
• Two UART (SCI) interfaces
• Hardware support for LIN 2.1 master mode
• HET
• Up to 16 programmable I/O channels
• 128-word HET RAM with parity
• 16-channel 10-bit MibADC
• 64-word FIFO buffer with parity
• Single or continuous conversion mode
• 1.55 µs minimum sample/conversion time
• Calibration mode and self-test features
• On-chip scan-based emulation logic
• IEEE 1149.1 (JTAG) test access port and boundary scan
• Supported packages
• 100-pin LQFP (PZ suffix)
• Green/lead-free
• Available development tools
• Development kit
• Code Composer Studio IDE
• HET assembler and simulator
• nowFlash programming tool
• Community resources: TI E2E Community