SAK-XC164CS-32F40F

Key features

• High Performance 16-bit CPU with 5-Stage Pipeline
• 25 ns Instruction Cycle Time at 40 MHz CPU Clock (Single-Cycle Execution)
• 1-Cycle Multiplication (16x16 bit), Background Division (32 / 16 bit) in 21 Cycles
• 1-Cycle Multiply-and-Accumulate (MAC) Instructions
• Enhanced Boolean Bit Manipulation Facilities
• Zero-Cycle Jump Execution
• Additional Instructions to Support HLL and Operating Systems
• Register-Based Design with Multiple Variable Register Banks
• Fast Context Switching Support with Two Additional Local Register Banks
• 16 Mbytes Total Linear Address Space for Code and Data
• 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible)
• On-Chip Memory Modules
• 2 Kbytes On-Chip Dual-Port RAM (DPRAM)
• 4 Kbytes On-Chip Data SRAM (DSRAM)
• 6 Kbytes On-Chip Program/Data SRAM (PSRAM)
• 256 Kbytes On-Chip Program Memory (Flash Memory or Mask ROM)
• On-Chip Peripheral Modules
• 14-Channel A/D Converter with Programmable Resolution (10-bit or 8-bit) and Conversion Time (down to 2.55 μs or 2.15 μs)
• Two 16-Channel General Purpose Capture/Compare Units (12 Input/Output Pins)
• Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6) (3/6 Capture/Compare Channels and 1 Compare Channel)
• Multi-Functional General Purpose Timer Unit with 5 Timers
• Two Synchronous/Asynchronous Serial Channels (USARTs)
• Two High-Speed-Synchronous Serial Channels
• On-Chip TwinCAN Interface (Rev. 2.0B active) with 32 Message Objects (Full CAN/Basic CAN) on Two CAN Nodes, and Gateway Functionality
• On-Chip Real Time Clock
• Programmable Watchdog Timer and Oscillator Watchdog
• Up to 12 Mbytes External Address Space for Code and Data
• Programmable External Bus Characteristics for Different Address Ranges
• Multiplexed or Demultiplexed External Address/Data Buses
• Selectable Address Bus Width – 16-Bit or 8-Bit Data Bus Width
• Four Programmable Chip-Select Signals
• Up to 79 General Purpose I/O Lines, partly with Selectable Input Thresholds and Hysteresis
• On-Chip Bootstrap Loader Supported by a Large Range of Development Tools like C-Compilers, MacroAssembler Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer Disassemblers, Programming Boards
• On-Chip Debug Support via JTAG Interface
• 100-Pin Green TQFP Package, 0.5 mm (19.7 mil) pitch (RoHS compliant)