SPC574S64E3CEFAR

The SPC574Sx series is a next-generation microcontroller family built on the Power Architecture embedded category, belonging to the 32-bit microcontroller family and representing the latest achievement in integrated automotive application controllers. Designed specifically for vehicle chassis and safety electronic applications, its advanced and cost-effective host processor core complies with the Power Architecture embedded category, implementing only the Variable Length Encoding (VLE) APU to improve code density. Operating at up to 140 MHz, it delivers high-performance processing optimized for low power consumption, and is supported by software drivers, operating systems, and configuration code to assist user implementation.

Applications

• Automotive ASIL D applications
• Vehicle chassis and safety electronics applications

Key features

• AEC-Q100 compliant
• High-performance e200z4d dual-core: 32-bit Power Architecture technology CPU; core frequency up to 140 MHz; dual-issue 5-stage pipeline in-order execution core; Variable Length Encoding (VLE); core MPU; floating-point operations with end-to-end error correction; 8 KB instruction cache with ECC; 32 KB local data RAM, 4 KB data cache, and 8 KB instruction cache
• 1600 KB (1.5 MB code + 64 KB data) on-chip flash: read-while-write support during program and erase operations; multi-block architecture enables EEPROM emulation
• 128 KB on-chip RAM (96 KB on-chip RAM + 32 KB local data RAM)
• Multi-channel eDMA controller with 32 channels
• Comprehensive next-generation ASIL D safety concept: ASIL D SEooC methodology (Safety Element out of Context); FCCU for collecting and responding to fault notifications; Memory Error Management Unit (MEMU) for collecting and reporting memory error events; end-to-end ECC logic; CRC unit
• 8 enhanced 12-bit SAR ADCs: 2 groups (each containing 3 ADCs and 1 monitor ADC); conversion time of 1.5 µs at 12 MHz; up to 32 physical channels; dual programmable CTU
• 4 general-purpose eTimer units (6 channels each)
• 4 FlexPWM units: 2 (4 channels each) for motor control with hardware synchronization between control systems; 2 (2 channels each) for SWG emulation
• Communication interfaces: 4 LINFlexD modules; 4 DSPI modules; 2 MCAN interfaces with advanced shared memory scheme (MCAN0: 808×32-bit words, MCAN1: 520×32-bit words) and CAN-FD support; 1 FlexRay module (2 channels, 128 message buffers); 2 SENT interfaces (3 channels each)
• Dual PLL providing stable clock domains for peripherals and FM-modulated domain for the computation shell
• Nexus Class 3 debug and trace interface
• On-chip CAN/UART bootloader with BAF; PHY configurable as UART
• Advanced and flexible power supply scheme: on-chip regulator for 1.2 V core logic supply (bypass mode supports external 1.2 V core logic supply); 3.3 V or 5 V I/O and ADC supply (2 independent power domains)
• Junction temperature range: -40℃ to 150℃