STM32C071GBU6N

This microcontroller is based on an Arm® Cortex®-M0+ 32-bit CPU core, operating at up to 48 MHz, with an extended temperature range of -40°C to 85°C/105°C/125°C. Memory configuration includes up to 128 KB of Flash (with protection and secure bootable areas) and 24 KB of SRAM with hardware parity. The system integrates a CRC calculation unit. Power management supports a wide supply voltage range of 2.0 V to 3.6 V, with independent I/O supply pins (1.65 V to 3.6 V), featuring POR/PDR, programmable BOR, and multiple low-power modes including Sleep, Stop, Standby, and Shutdown. The clock system includes a 4 to 48 MHz crystal oscillator, a trimmable 32 kHz crystal oscillator, an internal 48 MHz RC oscillator with ±1% accuracy (with clock recovery system), and an internal 32 kHz RC oscillator with ±5% accuracy. The device provides up to 61 fast I/O ports, all mappable to external interrupt vectors and 5 V tolerant. Peripheral resources include a 5-channel DMA controller; a 12-bit ADC with 0.4 µs conversion time supporting up to 19 external channels (conversion range 0 to 3.6 V); 9 timers in total, comprising a 16-bit timer for advanced motor control, one 32-bit timer, four 16-bit general-purpose timers, two watchdog timers, and a SysTick timer; and a calendar RTC with alarm functionality. Communication interfaces include two I²C bus interfaces supporting Fast Mode Plus (1 Mbps) with extra current sink capability (one supporting SMBus/PMBus and wakeup from Stop mode); two USARTs with master/slave SPI support (one supporting ISO 7816, LIN, IrDA, auto-baud rate detection, and wakeup from Stop mode); two SPIs at up to 24 Mbps with 4- to 16-bit programmable bit frames (one multiplexed with I²S), with two additional SPIs available via USART. A USB 2.0 full-speed device and host controller with crystal-less operation is also integrated. Development support includes an SWD interface and a 96-bit unique identifier. All packages comply with ECOPACK 2 environmental standards.

Key features

• Includes ST state-of-the-art patented technology
• Core: Arm 32-bit Cortex-M0+ CPU, frequency up to 48 MHz
• -40°C to 85°C/105°C/125°C operating temperature
• Memories: Up to 128 Kbytes of flash memory with protection and securable area, 24 Kbytes of SRAM with hardware parity check
• CRC calculation unit
• Reset and power management:
• Voltage range: 2.0 V to 3.6 V
• Separate I/O supply pin (1.65 V to 3.6 V)
• Power-on / power-down reset (POR/PDR)
• Programmable brownout reset (BOR)
• Low-power modes: Sleep, Stop, Standby, Shutdown
• Clock management:
• 4 to 48 MHz crystal oscillator
• 32 kHz crystal oscillator with calibration
• Internal 48 MHz RC oscillator (±1 %)
• Internal 48 MHz RC oscillator with clock recovery system
• Internal 32 kHz RC oscillator (±5 %)
• Up to 61 fast I/Os:
• All mappable on external interrupt vectors
• All 5 V-tolerant
• 5-channel DMA controller with flexible mapping
• 12-bit, 0.4 µs ADC (up to 19 ext. channels):
• Conversion range: 0 to 3.6 V
• 9 timers: 16-bit for advanced motor control, one 32-bit timer and four 16-bit general-purpose, two watchdogs, SysTick timer
• Calendar RTC with alarm
• Communication interfaces:
• Two I²C-bus interface supporting Fastmode Plus (1 Mbit/s) with extra current sink; one supporting SMBus/PMBus and wake-up from Stop mode
• Two USARTs with master/slave synchronous SPI; one supporting ISO7816 interface, LIN, IrDA capability, auto baud rate detection and wake-up feature
• Two SPIs (24 Mbit/s) with 4- to 16-bit programmable bitframe, one multiplexed with I²S interface; two extra SPIs through USARTs
• USB 2.0 FS device (crystal-less) and host controller
• Development support: serial wire debug (SWD)
• 96-bit unique ID
• All packages ECOPACK 2 compliant